Lines Matching refs:get_virtual_reg
35 get_virtual_reg(vB, OpndSize_32, 1, false);
47 get_virtual_reg(vB, OpndSize_32, 1, false);
60 get_virtual_reg(vB, OpndSize_64, 1, false);
73 get_virtual_reg(vB, OpndSize_64, 1, false);
87 get_virtual_reg(vB, OpndSize_32, 1, false);
101 get_virtual_reg(vB, OpndSize_64, 1, false);
115 get_virtual_reg(vB, OpndSize_32, PhysicalReg_EAX, true);
195 get_virtual_reg(vB, OpndSize_32, 1, false);
392 get_virtual_reg(vB, OpndSize_32, 1, false);
405 get_virtual_reg(vB, OpndSize_32, 1, false);
418 get_virtual_reg(vB, OpndSize_32, 1, false);
429 get_virtual_reg(v1, OpndSize_32, 1, false);
443 get_virtual_reg(v2, OpndSize_32, PhysicalReg_ECX, true);
444 get_virtual_reg(v1, OpndSize_32, 1, false);
676 get_virtual_reg(v1, OpndSize_32, PhysicalReg_EAX, true);
677 get_virtual_reg(v2, OpndSize_32, 2, false);
768 get_virtual_reg(vB, OpndSize_32, 1, false);
792 get_virtual_reg(vB, OpndSize_32, 1, false);
1002 get_virtual_reg(vB, OpndSize_32, 2, false);
1054 get_virtual_reg(vB, OpndSize_32, PhysicalReg_EAX, true);
1134 get_virtual_reg(v1, OpndSize_64, 1, false);
1135 get_virtual_reg(v2, OpndSize_64, 2, false);
1259 get_virtual_reg(v2, OpndSize_32, 1, false);
1263 get_virtual_reg(v1, OpndSize_32, 3, false);
1306 get_virtual_reg(v2, OpndSize_32, 1, false);
1307 get_virtual_reg(v2+1, OpndSize_32, 2, false);
1317 get_virtual_reg(v1, OpndSize_64, 1, false);
1385 get_virtual_reg(v1, OpndSize_64, 1, false);
1400 get_virtual_reg(v1, OpndSize_64, 1, false);
1737 get_virtual_reg(v1, OpndSize_32, 1, false);
1738 get_virtual_reg(v2, OpndSize_32, 2, false);
1776 get_virtual_reg(v1, OpndSize_64, 1, false);
1777 get_virtual_reg(v2, OpndSize_64, 2, false);
1924 get_virtual_reg(v1+1, OpndSize_32, 2, false);
1949 get_virtual_reg(v1, OpndSize_32, 1, false);
