Lines Matching refs:r2
300 ldr r2, [rSELF, #offThread_shadowSpace] @ to find out the jit exit state
302 ldr r3, [r2, #offShadowSpace_jitExitState] @ jit exit state
304 moveq r2,#kJitTSelectRequestHot @ ask for trace selection
386 GET_VREG(r2, r1) @ r2<- fp[B]
389 SET_VREG(r2, r0) @ fp[A]<- r2
401 GET_VREG(r2, r1) @ r2<- fp[BBBB]
403 SET_VREG(r2, r0) @ fp[AA]<- r2
415 GET_VREG(r2, r1) @ r2<- fp[BBBB]
417 SET_VREG(r2, r0) @ fp[AAAA]<- r2
426 mov r2, rINST, lsr #8 @ r2<- A(+)
428 and r2, r2, #15
430 add r2, rFP, r2, lsl #2 @ r2<- &fp[A]
433 stmia r2, {r0-r1} @ fp[A]<- r0/r1
444 mov r2, rINST, lsr #8 @ r2<- AA
446 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
450 stmia r2, {r0-r1} @ fp[AA]<- r0/r1
460 FETCH(r2, 1) @ r2<- AAAA
462 add r2, rFP, r2, lsl #2 @ r2<- &fp[AAAA]
465 stmia r2, {r0-r1} @ fp[AAAA]<- r0/r1
479 GET_VREG(r2, r1) @ r2<- fp[B]
482 SET_VREG(r2, r0) @ fp[A]<- r2
496 GET_VREG(r2, r1) @ r2<- fp[BBBB]
498 SET_VREG(r2, r0) @ fp[AA]<- r2
512 GET_VREG(r2, r1) @ r2<- fp[BBBB]
514 SET_VREG(r2, r0) @ fp[AAAA]<- r2
524 mov r2, rINST, lsr #8 @ r2<- AA
528 SET_VREG(r0, r2) @ fp[AA]<- r0
536 mov r2, rINST, lsr #8 @ r2<- AA
538 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
541 stmia r2, {r0-r1} @ fp[AA]<- r0/r1
552 mov r2, rINST, lsr #8 @ r2<- AA
556 SET_VREG(r0, r2) @ fp[AA]<- r0
565 mov r2, rINST, lsr #8 @ r2<- AA
569 SET_VREG(r3, r2) @ fp[AA]<- exception obj
591 mov r2, rINST, lsr #8 @ r2<- AA
592 GET_VREG(r0, r2) @ r0<- vAA
605 mov r2, rINST, lsr #8 @ r2<- AA
606 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
608 ldmia r2, {r0-r1} @ r0/r1 <- vAA/vAA+1
624 mov r2, rINST, lsr #8 @ r2<- AA
625 GET_VREG(r0, r2) @ r0<- vAA
704 FETCH_S(r2, 2) @ r2<- ssssBBBB (high)
706 orr r0, r0, r2, lsl #16 @ r0<- BBBBbbbb
720 FETCH(r2, 3) @ r2<- hhhh (high middle)
724 orr r1, r2, r3, lsl #16 @ r1<- HHHHhhhh (high word)
752 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- self->methodClassDex
754 ldr r2, [r2, #offDvmDex_pResStrings] @ r2<- dvmDex->pResStrings
755 ldr r0, [r2, r1, lsl #2] @ r0<- pResStrings[BBBB]
770 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- self->methodClassDex
772 ldr r2, [r2, #offDvmDex_pResStrings] @ r2<- dvmDex->pResStrings
774 ldr r0, [r2, r1, lsl #2] @ r0<- pResStrings[BBBB]
788 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- self->methodClassDex
790 ldr r2, [r2, #offDvmDex_pResClasses] @ r2<- dvmDex->pResClasses
791 ldr r0, [r2, r1, lsl #2] @ r0<- pResClasses[BBBB]
807 mov r2, rINST, lsr #8 @ r2<- AA
808 GET_VREG(r1, r2) @ r1<- vAA (object)
830 mov r2, rINST, lsr #8 @ r2<- AA
832 GET_VREG(r1, r2) @ r1<- vAA (object)
855 FETCH(r2, 1) @ r2<- BBBB
861 ldr r1, [r0, r2, lsl #2] @ r1<- resolved class
889 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- pDvmDex
892 ldr r2, [r2, #offDvmDex_pResClasses] @ r2<- pDvmDex->pResClasses
893 ldr r1, [r2, r3, lsl #2] @ r1<- resolved class
910 mov r2, rINST, lsr #8 @ r2<- A+
912 and r2, r2, #15 @ r2<- A
918 SET_VREG(r3, r2) @ vB<- length
961 FETCH(r2, 1) @ r2<- CCCC
966 ldr r0, [r3, r2, lsl #2] @ r0<- resolved class
993 mov r2, #0 @ r2<- false
1021 mov r2, #0 @ r2<- false
1056 mov r2, rINST, lsr #8 @ r2<- AA
1057 GET_VREG(r1, r2) @ r1<- vAA (exception object)
1079 add r2, r1, r1 @ r2<- byte offset, set flags
1082 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1245 and r2, r0, #255 @ r2<- BB
1247 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
1249 flds s0, [r2] @ s0<- vBB
1284 and r2, r0, #255 @ r2<- BB
1286 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
1288 flds s0, [r2] @ s0<- vBB
1323 and r2, r0, #255 @ r2<- BB
1325 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
1327 fldd d0, [r2] @ d0<- vBB
1362 and r2, r0, #255 @ r2<- BB
1364 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
1366 fldd d0, [r2] @ d0<- vBB
1391 * subs ip, r0, r2
1393 * subeqs ip, r0, r2
1405 and r2, r0, #255 @ r2<- BB
1407 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
1409 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
1410 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
1414 subs r1, r0, r2 @ r1<- r0 - r2
1436 GET_VREG(r2, r0) @ r2<- vA
1438 cmp r2, r3 @ compare (vA, vB)
1440 adds r2, r1, r1 @ convert to bytes, check sign
1441 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1471 GET_VREG(r2, r0) @ r2<- vA
1473 cmp r2, r3 @ compare (vA, vB)
1475 adds r2, r1, r1 @ convert to bytes, check sign
1476 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1506 GET_VREG(r2, r0) @ r2<- vA
1508 cmp r2, r3 @ compare (vA, vB)
1510 adds r2, r1, r1 @ convert to bytes, check sign
1511 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1541 GET_VREG(r2, r0) @ r2<- vA
1543 cmp r2, r3 @ compare (vA, vB)
1545 adds r2, r1, r1 @ convert to bytes, check sign
1546 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1576 GET_VREG(r2, r0) @ r2<- vA
1578 cmp r2, r3 @ compare (vA, vB)
1580 adds r2, r1, r1 @ convert to bytes, check sign
1581 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1611 GET_VREG(r2, r0) @ r2<- vA
1613 cmp r2, r3 @ compare (vA, vB)
1615 adds r2, r1, r1 @ convert to bytes, check sign
1616 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1643 GET_VREG(r2, r0) @ r2<- vAA
1645 cmp r2, #0 @ compare (vA, 0)
1675 GET_VREG(r2, r0) @ r2<- vAA
1677 cmp r2, #0 @ compare (vA, 0)
1707 GET_VREG(r2, r0) @ r2<- vAA
1709 cmp r2, #0 @ compare (vA, 0)
1739 GET_VREG(r2, r0) @ r2<- vAA
1741 cmp r2, #0 @ compare (vA, 0)
1771 GET_VREG(r2, r0) @ r2<- vAA
1773 cmp r2, #0 @ compare (vA, 0)
1803 GET_VREG(r2, r0) @ r2<- vAA
1805 cmp r2, #0 @ compare (vA, 0)
1882 FETCH_B(r2, 1, 0) @ r2<- BB
1885 GET_VREG(r0, r2) @ r0<- vBB (array object)
1894 ldr r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
1896 SET_VREG(r2, r9) @ vAA<- r2
1911 and r2, r0, #255 @ r2<- BB
1913 GET_VREG(r0, r2) @ r0<- vBB (array object)
1940 FETCH_B(r2, 1, 0) @ r2<- BB
1943 GET_VREG(r0, r2) @ r0<- vBB (array object)
1952 ldr r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
1954 SET_VREG(r2, r9) @ vAA<- r2
1972 FETCH_B(r2, 1, 0) @ r2<- BB
1975 GET_VREG(r0, r2) @ r0<- vBB (array object)
1984 ldrb r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
1986 SET_VREG(r2, r9) @ vAA<- r2
2004 FETCH_B(r2, 1, 0) @ r2<- BB
2007 GET_VREG(r0, r2) @ r0<- vBB (array object)
2016 ldrsb r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
2018 SET_VREG(r2, r9) @ vAA<- r2
2036 FETCH_B(r2, 1, 0) @ r2<- BB
2039 GET_VREG(r0, r2) @ r0<- vBB (array object)
2048 ldrh r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
2050 SET_VREG(r2, r9) @ vAA<- r2
2068 FETCH_B(r2, 1, 0) @ r2<- BB
2071 GET_VREG(r0, r2) @ r0<- vBB (array object)
2080 ldrsh r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
2082 SET_VREG(r2, r9) @ vAA<- r2
2099 FETCH_B(r2, 1, 0) @ r2<- BB
2102 GET_VREG(r0, r2) @ r0<- vBB (array object)
2111 GET_VREG(r2, r9) @ r2<- vAA
2113 str r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2128 and r2, r0, #255 @ r2<- BB
2130 GET_VREG(r0, r2) @ r0<- vBB (array object)
2154 and r2, r0, #255 @ r2<- BB
2156 GET_VREG(rINST, r2) @ rINST<- vBB (array object)
2182 FETCH_B(r2, 1, 0) @ r2<- BB
2185 GET_VREG(r0, r2) @ r0<- vBB (array object)
2194 GET_VREG(r2, r9) @ r2<- vAA
2196 strb r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2214 FETCH_B(r2, 1, 0) @ r2<- BB
2217 GET_VREG(r0, r2) @ r0<- vBB (array object)
2226 GET_VREG(r2, r9) @ r2<- vAA
2228 strb r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2246 FETCH_B(r2, 1, 0) @ r2<- BB
2249 GET_VREG(r0, r2) @ r0<- vBB (array object)
2258 GET_VREG(r2, r9) @ r2<- vAA
2260 strh r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2278 FETCH_B(r2, 1, 0) @ r2<- BB
2281 GET_VREG(r0, r2) @ r0<- vBB (array object)
2290 GET_VREG(r2, r9) @ r2<- vAA
2292 strh r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2309 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2311 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2314 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2316 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2333 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
2335 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2338 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2340 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2360 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2362 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2365 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2367 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2389 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2391 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2394 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2396 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2418 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2420 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2423 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2425 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2447 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2449 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2452 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2454 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2476 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2478 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2481 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2483 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2503 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2505 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2508 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2510 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2524 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
2526 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2529 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2531 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2550 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2552 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2555 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2557 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2578 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2580 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2583 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2585 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2607 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2609 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2612 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2614 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2636 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2638 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2641 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2643 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2665 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2667 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2670 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2672 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2689 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2691 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2698 mov r2, rINST, lsr #8 @ r2<- AA
2700 SET_VREG(r1, r2) @ fp[AA]<- r1
2712 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2714 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2743 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2745 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2752 mov r2, rINST, lsr #8 @ r2<- AA
2754 SET_VREG(r1, r2) @ fp[AA]<- r1
2770 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2772 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2779 mov r2, rINST, lsr #8 @ r2<- AA
2781 SET_VREG(r1, r2) @ fp[AA]<- r1
2797 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2799 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2806 mov r2, rINST, lsr #8 @ r2<- AA
2808 SET_VREG(r1, r2) @ fp[AA]<- r1
2824 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2826 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2833 mov r2, rINST, lsr #8 @ r2<- AA
2835 SET_VREG(r1, r2) @ fp[AA]<- r1
2851 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2853 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2860 mov r2, rINST, lsr #8 @ r2<- AA
2862 SET_VREG(r1, r2) @ fp[AA]<- r1
2877 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2879 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2884 mov r2, rINST, lsr #8 @ r2<- AA
2886 GET_VREG(r1, r2) @ r1<- fp[AA]
2905 ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
2907 cmp r2, #0 @ is resolved entry null?
2909 .LOP_SPUT_WIDE_finish: @ field ptr in r2, AA in r9
2914 add r2, r2, #offStaticField_value @ r2<- pointer to data
2915 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
2917 strd r0, [r2, #offStaticField_value] @ field<- vAA/vAA+1
2931 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2933 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2938 mov r2, rINST, lsr #8 @ r2<- AA
2940 GET_VREG(r1, r2) @ r1<- fp[AA]
2941 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
2958 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2960 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2965 mov r2, rINST, lsr #8 @ r2<- AA
2967 GET_VREG(r1, r2) @ r1<- fp[AA]
2986 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2988 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2993 mov r2, rINST, lsr #8 @ r2<- AA
2995 GET_VREG(r1, r2) @ r1<- fp[AA]
3014 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
3016 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
3021 mov r2, rINST, lsr #8 @ r2<- AA
3023 GET_VREG(r1, r2) @ r1<- fp[AA]
3042 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
3044 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
3049 mov r2, rINST, lsr #8 @ r2<- AA
3051 GET_VREG(r1, r2) @ r1<- fp[AA]
3083 mov r2, #METHOD_VIRTUAL @ resolver method type
3186 FETCH(r2, 2) @ r2<- FEDC or CCCC
3189 and r2, r2, #15 @ r2<- C (or stays CCCC)
3192 GET_VREG(r9, r2) @ r9<- first arg ("this")
3195 ldr r2, [rSELF, #offThread_method] @ r2<- method
3236 mov r2, #METHOD_VIRTUAL @ resolver method type
3347 FETCH(r2, 2) @ r2<- FEDC or CCCC
3350 and r2, r2, #15 @ r2<- C (or stays CCCC)
3353 GET_VREG(r9, r2) @ r9<- first arg ("this")
3356 ldr r2, [rSELF, #offThread_method] @ r2<- method
3456 rsc r1, r1, #0 @ r0/r1<- op, r2-r3 changed
3484 mvn r1, r1 @ r0/r1<- op, r2-r3 changed
3539 add r1, r1, #0x80000000 @ r0/r1<- op, r2-r3 changed
3634 GET_VREG(r2, r1) @ r2<- fp[B]
3637 SET_VREG(r2, r0) @ fp[A]<- r2
3692 bl __aeabi_l2d @ r0/r1<- op, r2-r3 changed
3825 bl d2l_doconv @ r0/r1<- op, r2-r3 changed
3963 and r2, r0, #255 @ r2<- BB
3965 GET_VREG(r0, r2) @ r0<- vBB
4004 and r2, r0, #255 @ r2<- BB
4006 GET_VREG(r0, r2) @ r0<- vBB
4046 and r2, r0, #255 @ r2<- BB
4048 GET_VREG(r0, r2) @ r0<- vBB
4087 and r2, r0, #255 @ r2<- BB
4089 GET_VREG(r0, r2) @ r0<- vBB
4129 and r2, r0, #255 @ r2<- BB
4131 GET_VREG(r0, r2) @ r0<- vBB
4170 and r2, r0, #255 @ r2<- BB
4172 GET_VREG(r0, r2) @ r0<- vBB
4211 and r2, r0, #255 @ r2<- BB
4213 GET_VREG(r0, r2) @ r0<- vBB
4252 and r2, r0, #255 @ r2<- BB
4254 GET_VREG(r0, r2) @ r0<- vBB
4293 and r2, r0, #255 @ r2<- BB
4295 GET_VREG(r0, r2) @ r0<- vBB
4334 and r2, r0, #255 @ r2<- BB
4336 GET_VREG(r0, r2) @ r0<- vBB
4375 and r2, r0, #255 @ r2<- BB
4377 GET_VREG(r0, r2) @ r0<- vBB
4399 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4415 and r2, r0, #255 @ r2<- BB
4418 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4420 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4421 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4423 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4428 adds r0, r0, r2 @ optional op; may set condition codes
4443 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4459 and r2, r0, #255 @ r2<- BB
4462 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4464 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4465 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4467 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4472 subs r0, r0, r2 @ optional op; may set condition codes
4504 and r2, r0, #255 @ r2<- BB
4506 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4508 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4509 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4510 mul ip, r2, r1 @ ip<- ZxW
4511 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
4512 mla r2, r0, r3, ip @ r2<- YxX + (ZxW)
4514 add r10, r2, r10 @ r10<- r10 + low(ZxW + (YxX))
4526 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4542 and r2, r0, #255 @ r2<- BB
4545 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4547 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4548 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4550 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4567 /* ldivmod returns quotient in r0/r1 and remainder in r2/r3 */
4571 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4587 and r2, r0, #255 @ r2<- BB
4590 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4592 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4593 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4595 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4603 stmia r9, {r2,r3} @ vAA/vAA+1<- r2/r3
4615 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4631 and r2, r0, #255 @ r2<- BB
4634 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4636 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4637 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4639 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4644 and r0, r0, r2 @ optional op; may set condition codes
4659 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4675 and r2, r0, #255 @ r2<- BB
4678 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4680 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4681 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4683 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4688 orr r0, r0, r2 @ optional op; may set condition codes
4703 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4719 and r2, r0, #255 @ r2<- BB
4722 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4724 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4725 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4727 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4732 eor r0, r0, r2 @ optional op; may set condition codes
4756 GET_VREG(r2, r0) @ r2<- vCC
4758 and r2, r2, #63 @ r2<- r2 & 0x3f
4761 mov r1, r1, asl r2 @ r1<- r1 << r2
4762 rsb r3, r2, #32 @ r3<- 32 - r2
4763 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
4764 subs ip, r2, #32 @ ip<- r2 - 32
4765 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
4785 GET_VREG(r2, r0) @ r2<- vCC
4787 and r2, r2, #63 @ r0<- r0 & 0x3f
4790 mov r0, r0, lsr r2 @ r0<- r2 >> r2
4791 rsb r3, r2, #32 @ r3<- 32 - r2
4792 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
4793 subs ip, r2, #32 @ ip<- r2 - 32
4794 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
4814 GET_VREG(r2, r0) @ r2<- vCC
4816 and r2, r2, #63 @ r0<- r0 & 0x3f
4819 mov r0, r0, lsr r2 @ r0<- r2 >> r2
4820 rsb r3, r2, #32 @ r3<- 32 - r2
4821 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
4822 subs ip, r2, #32 @ ip<- r2 - 32
4823 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
4843 and r2, r0, #255 @ r2<- BB
4845 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
4847 flds s0, [r2] @ s0<- vBB
4873 and r2, r0, #255 @ r2<- BB
4875 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
4877 flds s0, [r2] @ s0<- vBB
4903 and r2, r0, #255 @ r2<- BB
4905 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
4907 flds s0, [r2] @ s0<- vBB
4933 and r2, r0, #255 @ r2<- BB
4935 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
4937 flds s0, [r2] @ s0<- vBB
4972 and r2, r0, #255 @ r2<- BB
4974 GET_VREG(r0, r2) @ r0<- vBB
5005 and r2, r0, #255 @ r2<- BB
5007 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
5009 fldd d0, [r2] @ d0<- vBB
5035 and r2, r0, #255 @ r2<- BB
5037 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
5039 fldd d0, [r2] @ d0<- vBB
5065 and r2, r0, #255 @ r2<- BB
5067 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
5069 fldd d0, [r2] @ d0<- vBB
5095 and r2, r0, #255 @ r2<- BB
5097 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
5099 fldd d0, [r2] @ d0<- vBB
5117 * specifies an instruction that performs "result = r0-r1 op r2-r3".
5133 and r2, r0, #255 @ r2<- BB
5136 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
5138 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
5139 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
5141 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5592 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5610 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5613 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5618 adds r0, r0, r2 @ optional op; may set condition codes
5633 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5651 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5654 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5659 subs r0, r0, r2 @ optional op; may set condition codes
5685 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5687 mul ip, r2, r1 @ ip<- ZxW
5688 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
5689 mla r2, r0, r3, ip @ r2<- YxX + (ZxW)
5692 add r10, r2, r10 @ r10<- r10 + low(ZxW + (YxX))
5704 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5722 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5725 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5742 /* ldivmod returns quotient in r0/r1 and remainder in r2/r3 */
5746 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5764 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5767 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5775 stmia r9, {r2,r3} @ vAA/vAA+1<- r2/r3
5787 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5805 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5808 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5813 and r0, r0, r2 @ optional op; may set condition codes
5828 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5846 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5849 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5854 orr r0, r0, r2 @ optional op; may set condition codes
5869 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5887 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5890 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5895 eor r0, r0, r2 @ optional op; may set condition codes
5915 GET_VREG(r2, r3) @ r2<- vB
5917 and r2, r2, #63 @ r2<- r2 & 0x3f
5920 mov r1, r1, asl r2 @ r1<- r1 << r2
5921 rsb r3, r2, #32 @ r3<- 32 - r2
5922 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
5923 subs ip, r2, #32 @ ip<- r2 - 32
5925 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
5926 mov r0, r0, asl r2 @ r0<- r0 << r2
5941 GET_VREG(r2, r3) @ r2<- vB
5943 and r2, r2, #63 @ r2<- r2 & 0x3f
5946 mov r0, r0, lsr r2 @ r0<- r2 >> r2
5947 rsb r3, r2, #32 @ r3<- 32 - r2
5948 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
5949 subs ip, r2, #32 @ ip<- r2 - 32
5951 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
5952 mov r1, r1, asr r2 @ r1<- r1 >> r2
5967 GET_VREG(r2, r3) @ r2<- vB
5969 and r2, r2, #63 @ r2<- r2 & 0x3f
5972 mov r0, r0, lsr r2 @ r0<- r2 >> r2
5973 rsb r3, r2, #32 @ r3<- 32 - r2
5974 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
5975 subs ip, r2, #32 @ ip<- r2 - 32
5977 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
5978 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
6257 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
6275 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
6278 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
6310 mov r2, rINST, lsr #12 @ r2<- B
6312 GET_VREG(r0, r2) @ r0<- vB
6347 mov r2, rINST, lsr #12 @ r2<- B
6349 GET_VREG(r0, r2) @ r0<- vB
6384 mov r2, rINST, lsr #12 @ r2<- B
6386 GET_VREG(r0, r2) @ r0<- vB
6420 mov r2, rINST, lsr #12 @ r2<- B
6422 GET_VREG(r0, r2) @ r0<- vB
6457 mov r2, rINST, lsr #12 @ r2<- B
6459 GET_VREG(r0, r2) @ r0<- vB
6493 mov r2, rINST, lsr #12 @ r2<- B
6495 GET_VREG(r0, r2) @ r0<- vB
6529 mov r2, rINST, lsr #12 @ r2<- B
6531 GET_VREG(r0, r2) @ r0<- vB
6565 mov r2, rINST, lsr #12 @ r2<- B
6567 GET_VREG(r0, r2) @ r0<- vB
6603 and r2, r3, #255 @ r2<- BB
6604 GET_VREG(r0, r2) @ r0<- vBB
6641 and r2, r3, #255 @ r2<- BB
6642 GET_VREG(r0, r2) @ r0<- vBB
6680 and r2, r3, #255 @ r2<- BB
6681 GET_VREG(r0, r2) @ r0<- vBB
6718 and r2, r3, #255 @ r2<- BB
6719 GET_VREG(r0, r2) @ r0<- vBB
6757 and r2, r3, #255 @ r2<- BB
6758 GET_VREG(r0, r2) @ r0<- vBB
6795 and r2, r3, #255 @ r2<- BB
6796 GET_VREG(r0, r2) @ r0<- vBB
6833 and r2, r3, #255 @ r2<- BB
6834 GET_VREG(r0, r2) @ r0<- vBB
6871 and r2, r3, #255 @ r2<- BB
6872 GET_VREG(r0, r2) @ r0<- vBB
6909 and r2, r3, #255 @ r2<- BB
6910 GET_VREG(r0, r2) @ r0<- vBB
6947 and r2, r3, #255 @ r2<- BB
6948 GET_VREG(r0, r2) @ r0<- vBB
6985 and r2, r3, #255 @ r2<- BB
6986 GET_VREG(r0, r2) @ r0<- vBB
7016 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
7018 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7021 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7023 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7044 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
7046 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7049 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7051 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7069 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7071 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7078 mov r2, rINST, lsr #8 @ r2<- AA
7080 SET_VREG(r1, r2) @ fp[AA]<- r1
7096 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7098 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7103 mov r2, rINST, lsr #8 @ r2<- AA
7105 GET_VREG(r1, r2) @ r1<- fp[AA]
7127 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
7129 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7132 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7134 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7153 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
7155 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7158 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7160 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7176 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
7178 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7181 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7183 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7199 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7201 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7233 ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
7235 cmp r2, #0 @ is resolved entry null?
7237 .LOP_SPUT_WIDE_VOLATILE_finish: @ field ptr in r2, AA in r9
7242 add r2, r2, #offStaticField_value @ r2<- pointer to data
7243 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
7245 strd r0, [r2, #offStaticField_value] @ field<- vAA/vAA+1
7280 FETCH(r2, 1) @ r2<- BBBB
7304 ldrh r2, [rSELF, #offThread_subMode]
7307 ands r2, #kSubModeDebugProfile @ Any going on?
7338 ldrh r2, [rSELF, #offThread_subMode]
7341 ands r2, #kSubModeDebugProfile @ Any going on?
7370 ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
7371 tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
7394 mov r2, rINST, lsr #12 @ r2<- B
7395 GET_VREG(r3, r2) @ r3<- object we're operating on
7398 mov r2, rINST, lsr #8 @ r2<- A(+)
7402 and r2, r2, #15
7404 SET_VREG(r0, r2) @ fp[A]<- r0
7412 mov r2, rINST, lsr #12 @ r2<- B
7413 GET_VREG(r3, r2) @ r3<- object we're operating on
7416 mov r2, rINST, lsr #8 @ r2<- A(+)
7419 and r2, r2, #15
7421 add r3, rFP, r2, lsl #2 @ r3<- &fp[A]
7433 mov r2, rINST, lsr #12 @ r2<- B
7434 GET_VREG(r3, r2) @ r3<- object we're operating on
7437 mov r2, rINST, lsr #8 @ r2<- A(+)
7441 and r2, r2, #15
7443 SET_VREG(r0, r2) @ fp[A]<- r0
7453 mov r2, rINST, lsr #12 @ r2<- B
7454 GET_VREG(r3, r2) @ r3<- fp[B], the object pointer
7457 mov r2, rINST, lsr #8 @ r2<- A(+)
7459 and r2, r2, #15
7460 GET_VREG(r0, r2) @ r0<- fp[A]
7474 GET_VREG(r2, r1) @ r2<- fp[B], the object pointer
7476 cmp r2, #0 @ check object for null
7481 strd r0, [r2, r3] @ obj.field (64 bits, aligned)<- r0/r1
7491 mov r2, rINST, lsr #12 @ r2<- B
7492 GET_VREG(r3, r2) @ r3<- fp[B], the object pointer
7495 mov r2, rINST, lsr #8 @ r2<- A(+)
7497 and r2, r2, #15
7498 GET_VREG(r0, r2) @ r0<- fp[A]
7499 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
7503 strneb r2, [r2, r3, lsr #GC_CARD_SHIFT] @ mark card based on obj head
7526 ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
7527 ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
7529 ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
7552 ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
7553 ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
7555 ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
7571 ldr r2, [rSELF, #offThread_method] @ r2<- current method
7576 ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
7578 ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
7580 ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
7582 ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
7599 ldr r2, [rSELF, #offThread_method] @ r2<- current method
7604 ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
7606 ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
7608 ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
7610 ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
7629 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
7631 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7634 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7636 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7654 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7656 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7663 mov r2, rINST, lsr #8 @ r2<- AA
7665 SET_VREG(r1, r2) @ fp[AA]<- r1
7681 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7683 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7688 mov r2, rINST, lsr #8 @ r2<- AA
7690 GET_VREG(r1, r2) @ r1<- fp[AA]
7691 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
7770 mov r2, #1 @ r2<- true
7804 * r2 holds BBBB
7810 mov r1, r2 @ r1<- BBBB
7811 mov r2, #0 @ r2<- false
7864 mov r2, #1 @ r2<- true
7940 mov r2, #0 @ r2<- false
7954 * r2 holds class ref CCCC
7959 mov r1, r2 @ r1<- CCCC
7960 mov r2, #0 @ r2<- false
7975 mov r2, #ALLOC_DONT_TRACK @ don't track in local refs table
7978 mov r2, rINST, lsr #8 @ r2<- A+
7981 and r2, r2, #15 @ r2<- A
7983 SET_VREG(r0, r2) @ vA<- r0
7995 mov r2, #ALLOC_DONT_TRACK @ r2<- alloc flags
8022 add r2, rFP, r1, lsl #2 @ r2<- &fp[CCCC]
8023 1: ldr r3, [r2], #4 @ r3<- *r2++
8030 and r2, r10, #15 @ r2<- A
8032 GET_VREG(r3, r2) @ r3<- vA
8035 1: and r2, r1, #15 @ r2<- F/E/D/C
8036 GET_VREG(r3, r2) @ r3<- vF/vE/vD/vC
8047 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
8050 strneb r2, [r2, r0, lsr #GC_CARD_SHIFT] @ Mark card based on object head
8080 mov r2, #ALLOC_DONT_TRACK @ r2<- alloc flags
8107 add r2, rFP, r1, lsl #2 @ r2<- &fp[CCCC]
8108 1: ldr r3, [r2], #4 @ r3<- *r2++
8115 and r2, r10, #15 @ r2<- A
8117 GET_VREG(r3, r2) @ r3<- vA
8120 1: and r2, r1, #15 @ r2<- F/E/D/C
8121 GET_VREG(r3, r2) @ r3<- vF/vE/vD/vC
8132 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
8135 strneb r2, [r2, r0, lsr #GC_CARD_SHIFT] @ Mark card based on object head
8201 ldrd r2, [r0, #offArrayObject_contents] @ r2/r3<- vBB[vCC]
8204 stmia r9, {r2-r3} @ vAA/vAA+1<- r2/r3
8211 ldmia r9, {r2-r3} @ r2/r3<- vAA/vAA+1
8213 strd r2, [r0, #offArrayObject_contents] @ r2/r3<- vBB[vCC]
8233 ldr r2, [rSELF, #offThread_cardTable] @ get biased CT base
8237 strb r2, [r2, r1, lsr #GC_CARD_SHIFT] @ mark card using object head
8266 mov r2, rINST, lsr #8 @ r2<- A+
8268 and r2, r2, #15 @ r2<- A
8270 SET_VREG(r0, r2) @ fp[A]<- r0
8290 mov r2, rINST, lsr #8 @ r2<- A+
8292 and r2, r2, #15 @ r2<- A
8293 add r3, rFP, r2, lsl #2 @ r3<- &fp[A]
8312 mov r2, rINST, lsr #8 @ r2<- A+
8314 and r2, r2, #15 @ r2<- A
8316 SET_VREG(r0, r2) @ fp[A]<- r0
8333 mov r2, rINST, lsr #8 @ r2<- A+
8335 and r2, r2, #15 @ r2<- A
8337 SET_VREG(r0, r2) @ fp[A]<- r0
8354 mov r2, rINST, lsr #8 @ r2<- A+
8356 and r2, r2, #15 @ r2<- A
8358 SET_VREG(r0, r2) @ fp[A]<- r0
8375 mov r2, rINST, lsr #8 @ r2<- A+
8377 and r2, r2, #15 @ r2<- A
8379 SET_VREG(r0, r2) @ fp[A]<- r0
8396 mov r2, rINST, lsr #8 @ r2<- A+
8398 and r2, r2, #15 @ r2<- A
8400 SET_VREG(r0, r2) @ fp[A]<- r0
8433 mov r2, rINST, lsr #8 @ r2<- A+
8435 and r2, r2, #15 @ r2<- A
8437 add r2, rFP, r2, lsl #2 @ r3<- &fp[A]
8440 ldmia r2, {r0-r1} @ r0/r1<- fp[A]
8443 add r2, r9, r3 @ r2<- target address
8444 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
8464 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
8472 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
8571 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8576 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8599 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8604 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8625 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8630 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8651 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8656 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8677 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8682 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8703 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8708 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8729 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8734 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8755 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8760 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8781 * Returns StaticField pointer in r2.
8784 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8789 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8792 mov r2, r0 @ copy to r2
8810 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
8818 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8823 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8845 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8850 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8871 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8876 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8897 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8902 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8923 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8928 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8950 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
8955 ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
8967 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
8970 cmp r2, r3 @ compare (methodIndex, vtableCount)
8973 ldr r0, [r1, r2, lsl #2] @ r3<- vtable[methodIndex]
8978 mov r2, #METHOD_VIRTUAL @ resolver method type
9002 mov r2, #METHOD_DIRECT @ resolver method type
9014 mov r2, #METHOD_STATIC @ resolver method type
9023 ldrh r2, [rSELF, #offThread_subMode]
9025 ands r2, #kSubModeJitTraceBuild @ trace under construction?
9050 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
9055 ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
9067 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
9070 cmp r2, r3 @ compare (methodIndex, vtableCount)
9073 ldr r0, [r1, r2, lsl #2] @ r3<- vtable[methodIndex]
9078 mov r2, #METHOD_VIRTUAL @ resolver method type
9102 mov r2, #METHOD_DIRECT @ resolver method type
9114 mov r2, #METHOD_STATIC @ resolver method type
9123 ldrh r2, [rSELF, #offThread_subMode]
9125 ands r2, #kSubModeJitTraceBuild @ trace under construction?
9190 mov r2, #0 @ maxlong, as a double (low word)
9204 mov r2, #0 @ minlong, as a double (low word)
9213 mov r2, r4 @ compare against self
9238 mov r0, r0, asl r2 @ r0<- r0 << r2
9246 mov r1, r1, asr r2 @ r1<- r1 >> r2
9254 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
9294 mov r2, rINST, lsr #8 @ r2<- A+
9296 and r2, r2, #15 @ r2<- A
9298 SET_VREG(r0, r2) @ fp[A]<- r0
9331 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9336 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9357 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9362 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9389 mov r2, rINST, lsr #8 @ r2<- A+
9391 and r2, r2, #15 @ r2<- A
9393 SET_VREG(r0, r2) @ fp[A]<- r0
9413 mov r2, rINST, lsr #8 @ r2<- A+
9415 and r2, r2, #15 @ r2<- A
9416 add r3, rFP, r2, lsl #2 @ r3<- &fp[A]
9429 mov r2, rINST, lsr #8 @ r2<- A+
9431 and r2, r2, #15 @ r2<- A
9433 add r2, rFP, r2, lsl #2 @ r3<- &fp[A]
9436 ldmia r2, {r0-r1} @ r0/r1<- fp[A]
9439 add r2, r9, r3 @ r2<- target address
9440 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
9456 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9461 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9482 * Returns StaticField pointer in r2.
9485 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9490 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9493 mov r2, r0 @ copy to r2
9526 ldr r2, [rFP, ip, lsr #6] @ r2<- vE
9587 GET_VREG(r2, ip) @ r2<- vBase[2]
9671 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
9679 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
9690 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9695 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9715 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
9723 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9728 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9772 mov r2, rSELF @ arg2
9795 mov r2, rSELF @ arg2
9818 mov r2, rSELF @ arg2
9841 mov r2, rSELF @ arg2
9864 mov r2, rSELF @ arg2
9887 mov r2, rSELF @ arg2
9910 mov r2, rSELF @ arg2
9933 mov r2, rSELF @ arg2
9956 mov r2, rSELF @ arg2
9979 mov r2, rSELF @ arg2
10002 mov r2, rSELF @ arg2
10025 mov r2, rSELF @ arg2
10048 mov r2, rSELF @ arg2
10071 mov r2, rSELF @ arg2
10094 mov r2, rSELF @ arg2
10117 mov r2, rSELF @ arg2
10140 mov r2, rSELF @ arg2
10163 mov r2, rSELF @ arg2
10186 mov r2, rSELF @ arg2
10209 mov r2, rSELF @ arg2
10232 mov r2, rSELF @ arg2
10255 mov r2, rSELF @ arg2
10278 mov r2, rSELF @ arg2
10301 mov r2, rSELF @ arg2
10324 mov r2, rSELF @ arg2
10347 mov r2, rSELF @ arg2
10370 mov r2, rSELF @ arg2
10393 mov r2, rSELF @ arg2
10416 mov r2, rSELF @ arg2
10439 mov r2, rSELF @ arg2
10462 mov r2, rSELF @ arg2
10485 mov r2, rSELF @ arg2
10508 mov r2, rSELF @ arg2
10531 mov r2, rSELF @ arg2
10554 mov r2, rSELF @ arg2
10577 mov r2, rSELF @ arg2
10600 mov r2, rSELF @ arg2
10623 mov r2, rSELF @ arg2
10646 mov r2, rSELF @ arg2
10669 mov r2, rSELF @ arg2
10692 mov r2, rSELF @ arg2
10715 mov r2, rSELF @ arg2
10738 mov r2, rSELF @ arg2
10761 mov r2, rSELF @ arg2
10784 mov r2, rSELF @ arg2
10807 mov r2, rSELF @ arg2
10830 mov r2, rSELF @ arg2
10853 mov r2, rSELF @ arg2
10876 mov r2, rSELF @ arg2
10899 mov r2, rSELF @ arg2
10922 mov r2, rSELF @ arg2
10945 mov r2, rSELF @ arg2
10968 mov r2, rSELF @ arg2
10991 mov r2, rSELF @ arg2
11014 mov r2, rSELF @ arg2
11037 mov r2, rSELF @ arg2
11060 mov r2, rSELF @ arg2
11083 mov r2, rSELF @ arg2
11106 mov r2, rSELF @ arg2
11129 mov r2, rSELF @ arg2
11152 mov r2, rSELF @ arg2
11175 mov r2, rSELF @ arg2
11198 mov r2, rSELF @ arg2
11221 mov r2, rSELF @ arg2
11244 mov r2, rSELF @ arg2
11267 mov r2, rSELF @ arg2
11290 mov r2, rSELF @ arg2
11313 mov r2, rSELF @ arg2
11336 mov r2, rSELF @ arg2
11359 mov r2, rSELF @ arg2
11382 mov r2, rSELF @ arg2
11405 mov r2, rSELF @ arg2
11428 mov r2, rSELF @ arg2
11451 mov r2, rSELF @ arg2
11474 mov r2, rSELF @ arg2
11497 mov r2, rSELF @ arg2
11520 mov r2, rSELF @ arg2
11543 mov r2, rSELF @ arg2
11566 mov r2, rSELF @ arg2
11589 mov r2, rSELF @ arg2
11612 mov r2, rSELF @ arg2
11635 mov r2, rSELF @ arg2
11658 mov r2, rSELF @ arg2
11681 mov r2, rSELF @ arg2
11704 mov r2, rSELF @ arg2
11727 mov r2, rSELF @ arg2
11750 mov r2, rSELF @ arg2
11773 mov r2, rSELF @ arg2
11796 mov r2, rSELF @ arg2
11819 mov r2, rSELF @ arg2
11842 mov r2, rSELF @ arg2
11865 mov r2, rSELF @ arg2
11888 mov r2, rSELF @ arg2
11911 mov r2, rSELF @ arg2
11934 mov r2, rSELF @ arg2
11957 mov r2, rSELF @ arg2
11980 mov r2, rSELF @ arg2
12003 mov r2, rSELF @ arg2
12026 mov r2, rSELF @ arg2
12049 mov r2, rSELF @ arg2
12072 mov r2, rSELF @ arg2
12095 mov r2, rSELF @ arg2
12118 mov r2, rSELF @ arg2
12141 mov r2, rSELF @ arg2
12164 mov r2, rSELF @ arg2
12187 mov r2, rSELF @ arg2
12210 mov r2, rSELF @ arg2
12233 mov r2, rSELF @ arg2
12256 mov r2, rSELF @ arg2
12279 mov r2, rSELF @ arg2
12302 mov r2, rSELF @ arg2
12325 mov r2, rSELF @ arg2
12348 mov r2, rSELF @ arg2
12371 mov r2, rSELF @ arg2
12394 mov r2, rSELF @ arg2
12417 mov r2, rSELF @ arg2
12440 mov r2, rSELF @ arg2
12463 mov r2, rSELF @ arg2
12486 mov r2, rSELF @ arg2
12509 mov r2, rSELF @ arg2
12532 mov r2, rSELF @ arg2
12555 mov r2, rSELF @ arg2
12578 mov r2, rSELF @ arg2
12601 mov r2, rSELF @ arg2
12624 mov r2, rSELF @ arg2
12647 mov r2, rSELF @ arg2
12670 mov r2, rSELF @ arg2
12693 mov r2, rSELF @ arg2
12716 mov r2, rSELF @ arg2
12739 mov r2, rSELF @ arg2
12762 mov r2, rSELF @ arg2
12785 mov r2, rSELF @ arg2
12808 mov r2, rSELF @ arg2
12831 mov r2, rSELF @ arg2
12854 mov r2, rSELF @ arg2
12877 mov r2, rSELF @ arg2
12900 mov r2, rSELF @ arg2
12923 mov r2, rSELF @ arg2
12946 mov r2, rSELF @ arg2
12969 mov r2, rSELF @ arg2
12992 mov r2, rSELF @ arg2
13015 mov r2, rSELF @ arg2
13038 mov r2, rSELF @ arg2
13061 mov r2, rSELF @ arg2
13084 mov r2, rSELF @ arg2
13107 mov r2, rSELF @ arg2
13130 mov r2, rSELF @ arg2
13153 mov r2, rSELF @ arg2
13176 mov r2, rSELF @ arg2
13199 mov r2, rSELF @ arg2
13222 mov r2, rSELF @ arg2
13245 mov r2, rSELF @ arg2
13268 mov r2, rSELF @ arg2
13291 mov r2, rSELF @ arg2
13314 mov r2, rSELF @ arg2
13337 mov r2, rSELF @ arg2
13360 mov r2, rSELF @ arg2
13383 mov r2, rSELF @ arg2
13406 mov r2, rSELF @ arg2
13429 mov r2, rSELF @ arg2
13452 mov r2, rSELF @ arg2
13475 mov r2, rSELF @ arg2
13498 mov r2, rSELF @ arg2
13521 mov r2, rSELF @ arg2
13544 mov r2, rSELF @ arg2
13567 mov r2, rSELF @ arg2
13590 mov r2, rSELF @ arg2
13613 mov r2, rSELF @ arg2
13636 mov r2, rSELF @ arg2
13659 mov r2, rSELF @ arg2
13682 mov r2, rSELF @ arg2
13705 mov r2, rSELF @ arg2
13728 mov r2, rSELF @ arg2
13751 mov r2, rSELF @ arg2
13774 mov r2, rSELF @ arg2
13797 mov r2, rSELF @ arg2
13820 mov r2, rSELF @ arg2
13843 mov r2, rSELF @ arg2
13866 mov r2, rSELF @ arg2
13889 mov r2, rSELF @ arg2
13912 mov r2, rSELF @ arg2
13935 mov r2, rSELF @ arg2
13958 mov r2, rSELF @ arg2
13981 mov r2, rSELF @ arg2
14004 mov r2, rSELF @ arg2
14027 mov r2, rSELF @ arg2
14050 mov r2, rSELF @ arg2
14073 mov r2, rSELF @ arg2
14096 mov r2, rSELF @ arg2
14119 mov r2, rSELF @ arg2
14142 mov r2, rSELF @ arg2
14165 mov r2, rSELF @ arg2
14188 mov r2, rSELF @ arg2
14211 mov r2, rSELF @ arg2
14234 mov r2, rSELF @ arg2
14257 mov r2, rSELF @ arg2
14280 mov r2, rSELF @ arg2
14303 mov r2, rSELF @ arg2
14326 mov r2, rSELF @ arg2
14349 mov r2, rSELF @ arg2
14372 mov r2, rSELF @ arg2
14395 mov r2, rSELF @ arg2
14418 mov r2, rSELF @ arg2
14441 mov r2, rSELF @ arg2
14464 mov r2, rSELF @ arg2
14487 mov r2, rSELF @ arg2
14510 mov r2, rSELF @ arg2
14533 mov r2, rSELF @ arg2
14556 mov r2, rSELF @ arg2
14579 mov r2, rSELF @ arg2
14602 mov r2, rSELF @ arg2
14625 mov r2, rSELF @ arg2
14648 mov r2, rSELF @ arg2
14671 mov r2, rSELF @ arg2
14694 mov r2, rSELF @ arg2
14717 mov r2, rSELF @ arg2
14740 mov r2, rSELF @ arg2
14763 mov r2, rSELF @ arg2
14786 mov r2, rSELF @ arg2
14809 mov r2, rSELF @ arg2
14832 mov r2, rSELF @ arg2
14855 mov r2, rSELF @ arg2
14878 mov r2, rSELF @ arg2
14901 mov r2, rSELF @ arg2
14924 mov r2, rSELF @ arg2
14947 mov r2, rSELF @ arg2
14970 mov r2, rSELF @ arg2
14993 mov r2, rSELF @ arg2
15016 mov r2, rSELF @ arg2
15039 mov r2, rSELF @ arg2
15062 mov r2, rSELF @ arg2
15085 mov r2, rSELF @ arg2
15108 mov r2, rSELF @ arg2
15131 mov r2, rSELF @ arg2
15154 mov r2, rSELF @ arg2
15177 r2, rSELF @ arg2
15200 mov r2, rSELF @ arg2
15223 mov r2, rSELF @ arg2
15246 mov r2, rSELF @ arg2
15269 mov r2, rSELF @ arg2
15292 mov r2, rSELF @ arg2
15315 mov r2, rSELF @ arg2
15338 mov r2, rSELF @ arg2
15361 mov r2, rSELF @ arg2
15384 mov r2, rSELF @ arg2
15407 mov r2, rSELF @ arg2
15430 mov r2, rSELF @ arg2
15453 mov r2, rSELF @ arg2
15476 mov r2, rSELF @ arg2
15499 mov r2, rSELF @ arg2
15522 mov r2, rSELF @ arg2
15545 mov r2, rSELF @ arg2
15568 mov r2, rSELF @ arg2
15591 mov r2, rSELF @ arg2
15614 mov r2, rSELF @ arg2
15637 mov r2, rSELF @ arg2
15665 mov rFP, r2 @ restore Dalvik fp
15667 mov r2, #0
15668 str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
15675 mov r2,#kSVSPunt @ r2<- interpreter entry point
15687 mov r2,#kSVSSingleStep @ r2<- interpreter entry point
15694 mov r2,#kSVSNoProfile @ r2<- interpreter entry point
15702 mov r2,#kSVSTraceSelect @ r2<- interpreter entry point
15710 mov r2,#kSVSTraceSelect @ r2<- interpreter entry point
15718 mov r2,#kSVSBackwardBranch @ r2<- interpreter entry point
15726 mov r2,#kSVSNormal @ r2<- interpreter entry point
15734 mov r2,#kSVSNoChain @ r2<- interpreter entry point
15747 mov rFP, r2 @ restore Dalvik fp
15749 mov r2, #0
15750 str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
15853 movne r2,#kJitTSelectRequestHot @ ask for trace selection
15989 mov r2,#kJitTSelectRequest @ ask for trace selection
15992 moveq r2,#kJitTSelectRequest @ ask for trace selection
16013 * r2 is jit state.
16019 str r2,[rSELF,#offThread_jitState]
16049 mov r2,rSELF @ r2<- self (Thread) pointer
16060 * r2: self verification state
16074 mov r2,#kJitSelfVerification @ ask for self verification
16075 str r2,[rSELF,#offThread_jitState]
16126 movs r2, rINST, lsr #8 @ r2<- AA (arg count) -- test for zero
16132 @ r0=methodToCall, r1=CCCC, r2=count, r10=outs
16135 sub r10, r10, r2, lsl #2 @ r10<- "outs" area, for call args
16137 subs r2, r2, #1 @ count--
16156 movs r2, rINST, lsr #12 @ r2<- B (arg count) -- test for zero
16161 @ r0=methodToCall, r1=GFED, r2=count, r10=outs
16163 rsb r2, r2, #5 @ r2<- 5-r2
16164 add pc, pc, r2, lsl #4 @ computed goto, 4 instrs each
16167 ldr r2, [rFP, ip, lsr #6] @ r2<- vA (shift right 8, left 2)
16169 str r2, [r10, #-4]! @ *--outs = vA
16171 ldr r2, [rFP, ip, lsr #10] @ r2<- vG (shift right 12, left 2)
16173 str r2, [r10, #-4]! @ *--outs = vG
16175 ldr r2, [rFP, ip, lsr #6] @ r2<- vF
16177 str r2, [r10, #-4]! @ *--outs = vF
16179 ldr r2, [rFP, ip, lsr #2] @ r2<- vE
16181 str r2, [r10, #-4]! @ *--outs = vE
16183 ldr r2, [rFP, ip, lsl #2] @ r2<- vD
16185 str r2, [r10, #-4]! @ *--outs = vD
16191 ldr r2, [r0, #offMethod_insns] @ r2<- method->insns
16240 ldrh r9, [r2] @ r9 <- load INST from new PC
16242 mov rPC, r2 @ publish new rPC
16248 mov r2, #1
16249 str r2, [rSELF, #offThread_debugIsMethodEntry]
16284 mov r2, r0 @ r2<- methodToCall
16302 ldr ip, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
16320 @ r0=newFp, r1=&retval, r2=methodToCall, r3=self, lr=subModes
16322 mov r0, r2 @ r0<- methodToCall
16324 mov r2, rFP
16329 ldr ip, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
16333 ldmfd sp!, {r0-r3} @ r2<- methodToCall (others unneeded)
16336 mov r0, r2 @ r0<- methodToCall
16338 mov r2, rFP
16368 mov r2, r0 @ A2<- methodToCall
16395 ldr r2, [rFP, #(offStackSaveArea_method - sizeofStackSaveArea)]
16396 @ r2<- method we're returning to
16397 cmp r2, #0 @ is this a break frame?
16401 ldr r10, [r2, #offMethod_clazz] @ r10<- method->clazz
16404 ldrne r10, [r2, #offMethod_clazz] @ r10<- method->clazz
16410 str r2, [rSELF, #offThread_method]@ self->method = newSave->method
16432 ldr r1, [r0, #offStackSaveArea_prevFrame] @ r2<- prevFP
16475 ldrh r2, [rSELF, #offThread_subMode] @ get subMode flags
16480 cmp r2, #0 @ any special subMode handling needed?
16492 mov r2, r9 @ r2<- exception
16520 ldr r2, [r1, #offMethod_clazz] @ r2<- method->clazz
16522 ldr r2, [r2, #offClassObject_pDvmDex] @ r2<- method->clazz->pDvmDex
16524 str r2, [rSELF, #offThread_methodClassDex] @ self->pDvmDex = meth...
16575 ldr r2, strExceptionNotCaughtLocally
16576 0: add r2, pc
16621 stmfd sp!, {r0-r2,lr} @ save regs
16625 ldmfd sp!, {r0-r2, lr}
16713 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16718 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16736 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16741 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16751 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16755 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16765 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16770 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16780 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16782 mov r2, r0
16786 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16796 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16798 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16807 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16809 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16823 fmrx r2, fpscr @ get VFP reg
16825 and r2, r2, r1 @ clear masked bits
16826 orr r2, r2, r0 @ set specified bits
16827 fmxr fpscr, r2 @ set VFP reg
16828 mov r0, r2 @ return new value
