Lines Matching refs:r2
300 ldr r2, [rSELF, #offThread_shadowSpace] @ to find out the jit exit state
302 ldr r3, [r2, #offShadowSpace_jitExitState] @ jit exit state
304 moveq r2,#kJitTSelectRequestHot @ ask for trace selection
386 GET_VREG(r2, r1) @ r2<- fp[B]
389 SET_VREG(r2, r0) @ fp[A]<- r2
401 GET_VREG(r2, r1) @ r2<- fp[BBBB]
403 SET_VREG(r2, r0) @ fp[AA]<- r2
415 GET_VREG(r2, r1) @ r2<- fp[BBBB]
417 SET_VREG(r2, r0) @ fp[AAAA]<- r2
426 mov r2, rINST, lsr #8 @ r2<- A(+)
428 and r2, r2, #15
430 add r2, rFP, r2, lsl #2 @ r2<- &fp[A]
433 stmia r2, {r0-r1} @ fp[A]<- r0/r1
444 mov r2, rINST, lsr #8 @ r2<- AA
446 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
450 stmia r2, {r0-r1} @ fp[AA]<- r0/r1
460 r2, 1) @ r2<- AAAA
462 add r2, rFP, r2, lsl #2 @ r2<- &fp[AAAA]
465 stmia r2, {r0-r1} @ fp[AAAA]<- r0/r1
479 GET_VREG(r2, r1) @ r2<- fp[B]
482 SET_VREG(r2, r0) @ fp[A]<- r2
496 GET_VREG(r2, r1) @ r2<- fp[BBBB]
498 SET_VREG(r2, r0) @ fp[AA]<- r2
512 GET_VREG(r2, r1) @ r2<- fp[BBBB]
514 SET_VREG(r2, r0) @ fp[AAAA]<- r2
524 mov r2, rINST, lsr #8 @ r2<- AA
528 SET_VREG(r0, r2) @ fp[AA]<- r0
536 mov r2, rINST, lsr #8 @ r2<- AA
538 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
541 stmia r2, {r0-r1} @ fp[AA]<- r0/r1
552 mov r2, rINST, lsr #8 @ r2<- AA
556 SET_VREG(r0, r2) @ fp[AA]<- r0
565 mov r2, rINST, lsr #8 @ r2<- AA
569 SET_VREG(r3, r2) @ fp[AA]<- exception obj
591 mov r2, rINST, lsr #8 @ r2<- AA
592 GET_VREG(r0, r2) @ r0<- vAA
605 mov r2, rINST, lsr #8 @ r2<- AA
606 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
608 ldmia r2, {r0-r1} @ r0/r1 <- vAA/vAA+1
624 mov r2, rINST, lsr #8 @ r2<- AA
625 GET_VREG(r0, r2) @ r0<- vAA
704 FETCH_S(r2, 2) @ r2<- ssssBBBB (high)
706 orr r0, r0, r2, lsl #16 @ r0<- BBBBbbbb
720 FETCH(r2, 3) @ r2<- hhhh (high middle)
724 orr r1, r2, r3, lsl #16 @ r1<- HHHHhhhh (high word)
752 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- self->methodClassDex
754 ldr r2, [r2, #offDvmDex_pResStrings] @ r2<- dvmDex->pResStrings
755 ldr r0, [r2, r1, lsl #2] @ r0<- pResStrings[BBBB]
770 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- self->methodClassDex
772 ldr r2, [r2, #offDvmDex_pResStrings] @ r2<- dvmDex->pResStrings
774 ldr r0, [r2, r1, lsl #2] @ r0<- pResStrings[BBBB]
788 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- self->methodClassDex
790 ldr r2, [r2, #offDvmDex_pResClasses] @ r2<- dvmDex->pResClasses
791 ldr r0, [r2, r1, lsl #2] @ r0<- pResClasses[BBBB]
807 mov r2, rINST, lsr #8 @ r2<- AA
808 GET_VREG(r1, r2) @ r1<- vAA (object)
830 mov r2, rINST, lsr #8 @ r2<- AA
832 GET_VREG(r1, r2) @ r1<- vAA (object)
855 FETCH(r2, 1) @ r2<- BBBB
861 ldr r1, [r0, r2, lsl #2] @ r1<- resolved class
889 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- pDvmDex
892 ldr r2, [r2, #offDvmDex_pResClasses] @ r2<- pDvmDex->pResClasses
893 ldr r1, [r2, r3, lsl #2] @ r1<- resolved class
910 mov r2, rINST, lsr #8 @ r2<- A+
912 and r2, r2, #15 @ r2<- A
918 SET_VREG(r3, r2) @ vB<- length
961 FETCH(r2, 1) @ r2<- CCCC
966 ldr r0, [r3, r2, lsl #2] @ r0<- resolved class
993 mov r2, #0 @ r2<- false
1021 mov r2, #0 @ r2<- false
1056 mov r2, rINST, lsr #8 @ r2<- AA
1057 GET_VREG(r1, r2) @ r1<- vAA (exception object)
1079 add r2, r1, r1 @ r2<- byte offset, set flags
1082 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1258 and r2, r0, #255 @ r2<- BB
1260 GET_VREG(r9, r2) @ r9<- vBB
1312 and r2, r0, #255 @ r2<- BB
1314 GET_VREG(r9, r2) @ r9<- vBB
1352 ldmia r10, {r2-r3} @ r2/r3<- vCC/vCC+1
1387 ldmia r10, {r2-r3} @ r2/r3<- vCC/vCC+1
1413 * subs ip, r0, r2
1415 * subeqs ip, r0, r2
1427 and r2, r0, #255 @ r2<- BB
1429 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
1431 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
1432 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
1436 subs r1, r0, r2 @ r1<- r0 - r2
1458 GET_VREG(r2, r0) @ r2<- vA
1460 cmp r2, r3 @ compare (vA, vB)
1462 adds r2, r1, r1 @ convert to bytes, check sign
1463 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1493 GET_VREG(r2, r0) @ r2<- vA
1495 cmp r2, r3 @ compare (vA, vB)
1497 adds r2, r1, r1 @ convert to bytes, check sign
1498 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1528 GET_VREG(r2, r0) @ r2<- vA
1530 cmp r2, r3 @ compare (vA, vB)
1532 adds r2, r1, r1 @ convert to bytes, check sign
1533 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1563 GET_VREG(r2, r0) @ r2<- vA
1565 cmp r2, r3 @ compare (vA, vB)
1567 adds r2, r1, r1 @ convert to bytes, check sign
1568 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1598 GET_VREG(r2, r0) @ r2<- vA
1600 cmp r2, r3 @ compare (vA, vB)
1602 adds r2, r1, r1 @ convert to bytes, check sign
1603 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1633 GET_VREG(r2, r0) @ r2<- vA
1635 cmp r2, r3 @ compare (vA, vB)
1637 adds r2, r1, r1 @ convert to bytes, check sign
1638 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1665 GET_VREG(r2, r0) @ r2<- vAA
1667 cmp r2, #0 @ compare (vA, 0)
1697 GET_VREG(r2, r0) @ r2<- vAA
1699 cmp r2, #0 @ compare (vA, 0)
1729 GET_VREG(r2, r0) @ r2<- vAA
1731 cmp r2, #0 @ compare (vA, 0)
1761 GET_VREG(r2, r0) @ r2<- vAA
1763 cmp r2, #0 @ compare (vA, 0)
1793 GET_VREG(r2, r0) @ r2<- vAA
1795 cmp r2, #0 @ compare (vA, 0)
1825 GET_VREG(r2, r0) @ r2<- vAA
1827 cmp r2, #0 @ compare (vA, 0)
1904 FETCH_B(r2, 1, 0) @ r2<- BB
1907 GET_VREG(r0, r2) @ r0<- vBB (array object)
1916 ldr r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
1918 SET_VREG(r2, r9) @ vAA<- r2
1933 and r2, r0, #255 @ r2<- BB
1935 GET_VREG(r0, r2) @ r0<- vBB (array object)
1962 FETCH_B(r2, 1, 0) @ r2<- BB
1965 GET_VREG(r0, r2) @ r0<- vBB (array object)
1974 ldr r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
1976 SET_VREG(r2, r9) @ vAA<- r2
1994 FETCH_B(r2, 1, 0) @ r2<- BB
1997 GET_VREG(r0, r2) @ r0<- vBB (array object)
2006 ldrb r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
2008 SET_VREG(r2, r9) @ vAA<- r2
2026 FETCH_B(r2, 1, 0) @ r2<- BB
2029 GET_VREG(r0, r2) @ r0<- vBB (array object)
2038 ldrsb r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
2040 SET_VREG(r2, r9) @ vAA<- r2
2058 FETCH_B(r2, 1, 0) @ r2<- BB
2061 GET_VREG(r0, r2) @ r0<- vBB (array object)
2070 ldrh r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
2072 SET_VREG(r2, r9) @ vAA<- r2
2090 FETCH_B(r2, 1, 0) @ r2<- BB
2093 GET_VREG(r0, r2) @ r0<- vBB (array object)
2102 ldrsh r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
2104 SET_VREG(r2, r9) @ vAA<- r2
2121 FETCH_B(r2, 1, 0) @ r2<- BB
2124 GET_VREG(r0, r2) @ r0<- vBB (array object)
2133 GET_VREG(r2, r9) @ r2<- vAA
2135 str r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2150 and r2, r0, #255 @ r2<- BB
2152 GET_VREG(r0, r2) @ r0<- vBB (array object)
2176 and r2, r0, #255 @ r2<- BB
2178 GET_VREG(rINST, r2) @ rINST<- vBB (array object)
2204 FETCH_B(r2, 1, 0) @ r2<- BB
2207 GET_VREG(r0, r2) @ r0<- vBB (array object)
2216 GET_VREG(r2, r9) @ r2<- vAA
2218 strb r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2236 FETCH_B(r2, 1, 0) @ r2<- BB
2239 GET_VREG(r0, r2) @ r0<- vBB (array object)
2248 GET_VREG(r2, r9) @ r2<- vAA
2250 strb r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2268 FETCH_B(r2, 1, 0) @ r2<- BB
2271 GET_VREG(r0, r2) @ r0<- vBB (array object)
2280 GET_VREG(r2, r9) @ r2<- vAA
2282 strh r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2300 FETCH_B(r2, 1, 0) @ r2<- BB
2303 GET_VREG(r0, r2) @ r0<- vBB (array object)
2312 GET_VREG(r2, r9) @ r2<- vAA
2314 strh r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2331 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2333 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2336 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2338 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2355 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
2357 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2360 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2362 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2382 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2384 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2387 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2389 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2411 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2413 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2416 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2418 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2440 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2442 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2445 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2447 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2469 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2471 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2474 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2476 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2498 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2500 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2503 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2505 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2525 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2527 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2530 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2532 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2546 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
2548 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2551 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2553 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2572 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2574 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2577 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2579 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2600 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2602 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2605 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2607 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2629 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2631 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2634 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2636 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2658 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2660 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2663 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2665 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2687 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2689 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2692 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2694 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2711 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2713 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2720 mov r2, rINST, lsr #8 @ r2<- AA
2722 SET_VREG(r1, r2) @ fp[AA]<- r1
2734 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2736 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2765 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2767 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2774 mov r2, rINST, lsr #8 @ r2<- AA
2776 SET_VREG(r1, r2) @ fp[AA]<- r1
2792 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2794 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2801 mov r2, rINST, lsr #8 @ r2<- AA
2803 SET_VREG(r1, r2) @ fp[AA]<- r1
2819 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2821 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2828 mov r2, rINST, lsr #8 @ r2<- AA
2830 SET_VREG(r1, r2) @ fp[AA]<- r1
2846 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2848 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2855 mov r2, rINST, lsr #8 @ r2<- AA
2857 SET_VREG(r1, r2) @ fp[AA]<- r1
2873 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2875 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2882 mov r2, rINST, lsr #8 @ r2<- AA
2884 SET_VREG(r1, r2) @ fp[AA]<- r1
2899 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2901 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2906 mov r2, rINST, lsr #8 @ r2<- AA
2908 GET_VREG(r1, r2) @ r1<- fp[AA]
2927 ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
2929 cmp r2, #0 @ is resolved entry null?
2931 .LOP_SPUT_WIDE_finish: @ field ptr in r2, AA in r9
2936 add r2, r2, #offStaticField_value @ r2<- pointer to data
2937 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
2939 strd r0, [r2, #offStaticField_value] @ field<- vAA/vAA+1
2953 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2955 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2960 mov r2, rINST, lsr #8 @ r2<- AA
2962 GET_VREG(r1, r2) @ r1<- fp[AA]
2963 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
2980 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2982 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2987 mov r2, rINST, lsr #8 @ r2<- AA
2989 GET_VREG(r1, r2) @ r1<- fp[AA]
3008 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
3010 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
3015 mov r2, rINST, lsr #8 @ r2<- AA
3017 GET_VREG(r1, r2) @ r1<- fp[AA]
3036 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
3038 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
3043 mov r2, rINST, lsr #8 @ r2<- AA
3045 GET_VREG(r1, r2) @ r1<- fp[AA]
3064 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
3066 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
3071 mov r2, rINST, lsr #8 @ r2<- AA
3073 GET_VREG(r1, r2) @ r1<- fp[AA]
3105 mov r2, #METHOD_VIRTUAL @ resolver method type
3208 FETCH(r2, 2) @ r2<- FEDC or CCCC
3211 and r2, r2, #15 @ r2<- C (or stays CCCC)
3214 GET_VREG(r9, r2) @ r9<- first arg ("this")
3217 ldr r2, [rSELF, #offThread_method] @ r2<- method
3258 mov r2, #METHOD_VIRTUAL @ resolver method type
3369 FETCH(r2, 2) @ r2<- FEDC or CCCC
3372 and r2, r2, #15 @ r2<- C (or stays CCCC)
3375 GET_VREG(r9, r2) @ r9<- first arg ("this")
3378 ldr r2, [rSELF, #offThread_method] @ r2<- method
3478 rsc r1, r1, #0 @ r0/r1<- op, r2-r3 changed
3506 mvn r1, r1 @ r0/r1<- op, r2-r3 changed
3561 add r1, r1, #0x80000000 @ r0/r1<- op, r2-r3 changed
3660 GET_VREG(r2, r1) @ r2<- fp[B]
3663 SET_VREG(r2, r0) @ fp[A]<- r2
3718 bl __aeabi_l2d @ r0/r1<- op, r2-r3 changed
3889 mov r2, #0x80000000 @ maxint, as a double (low word)
3890 mov r2, r2, asr #9 @ 0xffc00000
3905 mov r2, #0 @ minint, as a double (low word)
3913 mov r2, r4 @ compare against self
3950 bl d2l_doconv @ r0/r1<- op, r2-r3 changed
4093 and r2, r0, #255 @ r2<- BB
4095 GET_VREG(r0, r2) @ r0<- vBB
4134 and r2, r0, #255 @ r2<- BB
4136 GET_VREG(r0, r2) @ r0<- vBB
4176 and r2, r0, #255 @ r2<- BB
4178 GET_VREG(r0, r2) @ r0<- vBB
4217 and r2, r0, #255 @ r2<- BB
4219 GET_VREG(r0, r2) @ r0<- vBB
4259 and r2, r0, #255 @ r2<- BB
4261 GET_VREG(r0, r2) @ r0<- vBB
4300 and r2, r0, #255 @ r2<- BB
4302 GET_VREG(r0, r2) @ r0<- vBB
4341 and r2, r0, #255 @ r2<- BB
4343 GET_VREG(r0, r2) @ r0<- vBB
4382 and r2, r0, #255 @ r2<- BB
4384 GET_VREG(r0, r2) @ r0<- vBB
4423 and r2, r0, #255 @ r2<- BB
4425 GET_VREG(r0, r2) @ r0<- vBB
4464 and r2, r0, #255 @ r2<- BB
4466 GET_VREG(r0, r2) @ r0<- vBB
4505 and r2, r0, #255 @ r2<- BB
4507 GET_VREG(r0, r2) @ r0<- vBB
4529 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4545 and r2, r0, #255 @ r2<- BB
4548 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4550 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4551 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4553 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4558 adds r0, r0, r2 @ optional op; may set condition codes
4573 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4589 and r2, r0, #255 @ r2<- BB
4592 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4594 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4595 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4597 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4602 subs r0, r0, r2 @ optional op; may set condition codes
4634 and r2, r0, #255 @ r2<- BB
4636 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4638 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4639 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4640 mul ip, r2, r1 @ ip<- ZxW
4641 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
4642 mla r2, r0, r3, ip @ r2<- YxX + (ZxW)
4644 add r10, r2, r10 @ r10<- r10 + low(ZxW + (YxX))
4656 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4672 and r2, r0, #255 @ r2<- BB
4675 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4677 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4678 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4680 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4697 /* ldivmod returns quotient in r0/r1 and remainder in r2/r3 */
4701 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4717 and r2, r0, #255 @ r2<- BB
4720 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4722 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4723 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4725 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4733 stmia r9, {r2,r3} @ vAA/vAA+1<- r2/r3
4745 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4761 and r2, r0, #255 @ r2<- BB
4764 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4766 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4767 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4769 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4774 and r0, r0, r2 @ optional op; may set condition codes
4789 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4805 and r2, r0, #255 @ r2<- BB
4808 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4810 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4811 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4813 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4818 orr r0, r0, r2 @ optional op; may set condition codes
4833 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4849 and r2, r0, #255 @ r2<- BB
4852 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4854 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4855 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4857 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4862 eor r0, r0, r2 @ optional op; may set condition codes
4886 GET_VREG(r2, r0) @ r2<- vCC
4888 and r2, r2, #63 @ r2<- r2 & 0x3f
4891 mov r1, r1, asl r2 @ r1<- r1 << r2
4892 rsb r3, r2, #32 @ r3<- 32 - r2
4893 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
4894 subs ip, r2, #32 @ ip<- r2 - 32
4895 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
4915 GET_VREG(r2, r0) @ r2<- vCC
4917 and r2, r2, #63 @ r0<- r0 & 0x3f
4920 mov r0, r0, lsr r2 @ r0<- r2 >> r2
4921 rsb r3, r2, #32 @ r3<- 32 - r2
4922 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
4923 subs ip, r2, #32 @ ip<- r2 - 32
4924 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
4944 GET_VREG(r2, r0) @ r2<- vCC
4946 and r2, r2, #63 @ r0<- r0 & 0x3f
4949 mov r0, r0, lsr r2 @ r0<- r2 >> r2
4950 rsb r3, r2, #32 @ r3<- 32 - r2
4951 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
4952 subs ip, r2, #32 @ ip<- r2 - 32
4953 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
4981 and r2, r0, #255 @ r2<- BB
4983 GET_VREG(r0, r2) @ r0<- vBB
5022 and r2, r0, #255 @ r2<- BB
5024 GET_VREG(r0, r2) @ r0<- vBB
5063 and r2, r0, #255 @ r2<- BB
5065 GET_VREG(r0, r2) @ r0<- vBB
5104 and r2, r0, #255 @ r2<- BB
5106 GET_VREG(r0, r2) @ r0<- vBB
5146 and r2, r0, #255 @ r2<- BB
5148 GET_VREG(r0, r2) @ r0<- vBB
5170 * specifies an instruction that performs "result = r0-r1 op r2-r3".
5186 and r2, r0, #255 @ r2<- BB
5189 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
5191 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
5192 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
5194 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5214 * specifies an instruction that performs "result = r0-r1 op r2-r3".
5230 and r2, r0, #255 @ r2<- BB
5233 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
5235 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
5236 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
5238 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5258 * specifies an instruction that performs "result = r0-r1 op r2-r3".
5274 and r2, r0, #255 @ r2<- BB
5277 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
5279 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
5280 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
5282 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5302 * specifies an instruction that performs "result = r0-r1 op r2-r3".
5318 and r2, r0, #255 @ r2<- BB
5321 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
5323 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
5324 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
5326 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5347 * specifies an instruction that performs "result = r0-r1 op r2-r3".
5363 and r2, r0, #255 @ r2<- BB
5366 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
5368 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
5369 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
5371 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5822 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5840 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5843 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5848 adds r0, r0, r2 @ optional op; may set condition codes
5863 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5881 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5884 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5889 subs r0, r0, r2 @ optional op; may set condition codes
5915 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5917 mul ip, r2, r1 @ ip<- ZxW
5918 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
5919 mla r2, r0, r3, ip @ r2<- YxX + (ZxW)
5922 add r10, r2, r10 @ r10<- r10 + low(ZxW + (YxX))
5934 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5952 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5955 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5972 /* ldivmod returns quotient in r0/r1 and remainder in r2/r3 */
5976 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5994 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5997 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
6005 stmia r9, {r2,r3} @ vAA/vAA+1<- r2/r3
6017 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
6035 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
6038 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
6043 and r0, r0, r2 @ optional op; may set condition codes
6058 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
6076 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
6079 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
6084 orr r0, r0, r2 @ optional op; may set condition codes
6099 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
6117 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
6120 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
6125 eor r0, r0, r2 @ optional op; may set condition codes
6145 GET_VREG(r2, r3) @ r2<- vB
6147 and r2, r2, #63 @ r2<- r2 & 0x3f
6150 mov r1, r1, asl r2 @ r1<- r1 << r2
6151 rsb r3, r2, #32 @ r3<- 32 - r2
6152 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
6153 subs ip, r2, #32 @ ip<- r2 - 32
6155 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
6156 mov r0, r0, asl r2 @ r0<- r0 << r2
6171 GET_VREG(r2, r3) @ r2<- vB
6173 and r2, r2, #63 @ r2<- r2 & 0x3f
6176 mov r0, r0, lsr r2 @ r0<- r2 >> r2
6177 rsb r3, r2, #32 @ r3<- 32 - r2
6178 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
6179 subs ip, r2, #32 @ ip<- r2 - 32
6181 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
6182 mov r1, r1, asr r2 @ r1<- r1 >> r2
6197 GET_VREG(r2, r3) @ r2<- vB
6199 and r2, r2, #63 @ r2<- r2 & 0x3f
6202 mov r0, r0, lsr r2 @ r0<- r2 >> r2
6203 rsb r3, r2, #32 @ r3<- 32 - r2
6204 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
6205 subs ip, r2, #32 @ ip<- r2 - 32
6207 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
6208 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
6414 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
6432 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
6435 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
6455 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
6473 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
6476 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
6496 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
6514 ldmia r1, {r2r2/r3<- vBB/vBB+1
6517 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
6537 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
6555 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
6558 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
6579 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
6597 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
6600 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
6632 mov r2, rINST, lsr #12 @ r2<- B
6634 GET_VREG(r0, r2) @ r0<- vB
6669 mov r2, rINST, lsr #12 @ r2<- B
6671 GET_VREG(r0, r2) @ r0<- vB
6706 mov r2, rINST, lsr #12 @ r2<- B
6708 GET_VREG(r0, r2) @ r0<- vB
6742 mov r2, rINST, lsr #12 @ r2<- B
6744 GET_VREG(r0, r2) @ r0<- vB
6779 mov r2, rINST, lsr #12 @ r2<- B
6781 GET_VREG(r0, r2) @ r0<- vB
6815 mov r2, rINST, lsr #12 @ r2<- B
6817 GET_VREG(r0, r2) @ r0<- vB
6851 mov r2, rINST, lsr #12 @ r2<- B
6853 GET_VREG(r0, r2) @ r0<- vB
6887 mov r2, rINST, lsr #12 @ r2<- B
6889 GET_VREG(r0, r2) @ r0<- vB
6925 and r2, r3, #255 @ r2<- BB
6926 GET_VREG(r0, r2) @ r0<- vBB
6963 and r2, r3, #255 @ r2<- BB
6964 GET_VREG(r0, r2) @ r0<- vBB
7002 and r2, r3, #255 @ r2<- BB
7003 GET_VREG(r0, r2) @ r0<- vBB
7040 and r2, r3, #255 @ r2<- BB
7041 GET_VREG(r0, r2) @ r0<- vBB
7079 and r2, r3, #255 @ r2<- BB
7080 GET_VREG(r0, r2) @ r0<- vBB
7117 and r2, r3, #255 @ r2<- BB
7118 GET_VREG(r0, r2) @ r0<- vBB
7155 and r2, r3, #255 @ r2<- BB
7156 GET_VREG(r0, r2) @ r0<- vBB
7193 and r2, r3, #255 @ r2<- BB
7194 GET_VREG(r0, r2) @ r0<- vBB
7231 and r2, r3, #255 @ r2<- BB
7232 GET_VREG(r0, r2) @ r0<- vBB
7269 and r2, r3, #255 @ r2<- BB
7270 GET_VREG(r0, r2) @ r0<- vBB
7307 and r2, r3, #255 @ r2<- BB
7308 GET_VREG(r0, r2) @ r0<- vBB
7338 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
7340 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7343 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7345 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7366 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
7368 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7371 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7373 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7391 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7393 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7400 mov r2, rINST, lsr #8 @ r2<- AA
7402 SET_VREG(r1, r2) @ fp[AA]<- r1
7418 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7420 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7425 mov r2, rINST, lsr #8 @ r2<- AA
7427 GET_VREG(r1, r2) @ r1<- fp[AA]
7449 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
7451 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7454 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7456 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7475 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
7477 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7480 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7482 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7498 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
7500 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7503 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7505 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7521 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7523 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7555 ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
7557 cmp r2, #0 @ is resolved entry null?
7559 .LOP_SPUT_WIDE_VOLATILE_finish: @ field ptr in r2, AA in r9
7564 add r2, r2, #offStaticField_value @ r2<- pointer to data
7565 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
7567 strd r0, [r2, #offStaticField_value] @ field<- vAA/vAA+1
7602 FETCH(r2, 1) @ r2<- BBBB
7626 ldrh r2, [rSELF, #offThread_subMode]
7629 ands r2, #kSubModeDebugProfile @ Any going on?
7660 ldrh r2, [rSELF, #offThread_subMode]
7663 ands r2, #kSubModeDebugProfile @ Any going on?
7692 ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
7693 tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
7716 mov r2, rINST, lsr #12 @ r2<- B
7717 GET_VREG(r3, r2) @ r3<- object we're operating on
7720 mov r2, rINST, lsr #8 @ r2<- A(+)
7724 and r2, r2, #15
7726 SET_VREG(r0, r2) @ fp[A]<- r0
7734 mov r2, rINST, lsr #12 @ r2<- B
7735 GET_VREG(r3, r2) @ r3<- object we're operating on
7738 mov r2, rINST, lsr #8 @ r2<- A(+)
7741 and r2, r2, #15
7743 add r3, rFP, r2, lsl #2 @ r3<- &fp[A]
7755 mov r2, rINST, lsr #12 @ r2<- B
7756 GET_VREG(r3, r2) @ r3<- object we're operating on
7759 mov r2, rINST, lsr #8 @ r2<- A(+)
7763 and r2, r2, #15
7765 SET_VREG(r0, r2) @ fp[A]<- r0
7775 mov r2, rINST, lsr #12 @ r2<- B
7776 GET_VREG(r3, r2) @ r3<- fp[B], the object pointer
7779 mov r2, rINST, lsr #8 @ r2<- A(+)
7781 and r2, r2, #15
7782 GET_VREG(r0, r2) @ r0<- fp[A]
7796 GET_VREG(r2, r1) @ r2<- fp[B], the object pointer
7798 cmp r2, #0 @ check object for null
7803 strd r0, [r2, r3] @ obj.field (64 bits, aligned)<- r0/r1
7813 mov r2, rINST, lsr #12 @ r2<- B
7814 GET_VREG(r3, r2) @ r3<- fp[B], the object pointer
7817 mov r2, rINST, lsr #8 @ r2<- A(+)
7819 and r2, r2, #15
7820 GET_VREG(r0, r2) @ r0<- fp[A]
7821 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
7825 strneb r2, [r2, r3, lsr #GC_CARD_SHIFT] @ mark card based on obj head
7848 ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
7849 ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
7851 ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
7874 ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
7875 ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
7877 ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
7893 ldr r2, [rSELF, #offThread_method] @ r2<- current method
7898 ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
7900 ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
7902 ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
7904 ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
7921 ldr r2, [rSELF, #offThread_method] @ r2<- current method
7926 ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
7928 ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
7930 ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
7932 ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
7951 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
7953 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7956 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7958 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7976 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7978 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7985 mov r2, rINST, lsr #8 @ r2<- AA
7987 SET_VREG(r1, r2) @ fp[AA]<- r1
8003 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
8005 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
8010 mov r2, rINST, lsr #8 @ r2<- AA
8012 GET_VREG(r1, r2) @ r1<- fp[AA]
8013 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
8092 mov r2, #1 @ r2<- true
8126 * r2 holds BBBB
8132 mov r1, r2 @ r1<- BBBB
8133 mov r2, #0 @ r2<- false
8186 mov r2, #1 @ r2<- true
8262 mov r2, #0 @ r2<- false
8276 * r2 holds class ref CCCC
8281 mov r1, r2 @ r1<- CCCC
8282 mov r2, #0 @ r2<- false
8297 mov r2, #ALLOC_DONT_TRACK @ don't track in local refs table
8300 mov r2, rINST, lsr #8 @ r2<- A+
8303 and r2, r2, #15 @ r2<- A
8305 SET_VREG(r0, r2) @ vA<- r0
8317 mov r2, #ALLOC_DONT_TRACK @ r2<- alloc flags
8344 add r2, rFP, r1, lsl #2 @ r2<- &fp[CCCC]
8345 1: ldr r3, [r2], #4 @ r3<- *r2++
8352 and r2, r10, #15 @ r2<- A
8354 GET_VREG(r3, r2) @ r3<- vA
8357 1: and r2, r1, #15 @ r2<- F/E/D/C
8358 GET_VREG(r3, r2) @ r3<- vF/vE/vD/vC
8369 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
8372 strneb r2, [r2, r0, lsr #GC_CARD_SHIFT] @ Mark card based on object head
8402 mov r2, #ALLOC_DONT_TRACK @ r2<- alloc flags
8429 add r2, rFP, r1, lsl #2 @ r2<- &fp[CCCC]
8430 1: ldr r3, [r2], #4 @ r3<- *r2++
8437 and r2, r10, #15 @ r2<- A
8439 GET_VREG(r3, r2) @ r3<- vA
8442 1: and r2, r1, #15 @ r2<- F/E/D/C
8443 GET_VREG(r3, r2) @ r3<- vF/vE/vD/vC
8454 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
8457 strneb r2, [r2, r0, lsr #GC_CARD_SHIFT] @ Mark card based on object head
8496 and r2, r0, #255 @ r2<- BB
8498 GET_VREG(r9, r2) @ r9<- vBB
8559 and r2, r0, #255 @ r2<- BB
8561 GET_VREG(r9, r2) @ r9<- vBB
8611 ldmia r9, {r2-r3}
8626 ldmia r9, {r2-r3}
8659 ldrd r2, [r0, #offArrayObject_contents] @ r2/r3<- vBB[vCC]
8662 stmia r9, {r2-r3} @ vAA/vAA+1<- r2/r3
8669 ldmia r9, {r2-r3} @ r2/r3<- vAA/vAA+1
8671 strd r2, [r0, #offArrayObject_contents] @ r2/r3<- vBB[vCC]
8691 ldr r2, [rSELF, #offThread_cardTable] @ get biased CT base
8695 strb r2, [r2, r1, lsr #GC_CARD_SHIFT] @ mark card using object head
8724 mov r2, rINST, lsr #8 @ r2<- A+
8726 and r2, r2, #15 @ r2<- A
8728 SET_VREG(r0, r2) @ fp[A]<- r0
8748 mov r2, rINST, lsr #8 @ r2<- A+
8750 and r2, r2, #15 @ r2<- A
8751 add r3, rFP, r2, lsl #2 @ r3<- &fp[A]
8770 mov r2, rINST, lsr #8 @ r2<- A+
8772 and r2, r2, #15 @ r2<- A
8774 SET_VREG(r0, r2) @ fp[A]<- r0
8791 mov r2, rINST, lsr #8 @ r2<- A+
8793 and r2, r2, #15 @ r2<- A
8795 SET_VREG(r0, r2
8812 mov r2, rINST, lsr #8 @ r2<- A+
8814 and r2, r2, #15 @ r2<- A
8816 SET_VREG(r0, r2) @ fp[A]<- r0
8833 mov r2, rINST, lsr #8 @ r2<- A+
8835 and r2, r2, #15 @ r2<- A
8837 SET_VREG(r0, r2) @ fp[A]<- r0
8854 mov r2, rINST, lsr #8 @ r2<- A+
8856 and r2, r2, #15 @ r2<- A
8858 SET_VREG(r0, r2) @ fp[A]<- r0
8891 mov r2, rINST, lsr #8 @ r2<- A+
8893 and r2, r2, #15 @ r2<- A
8895 add r2, rFP, r2, lsl #2 @ r3<- &fp[A]
8898 ldmia r2, {r0-r1} @ r0/r1<- fp[A]
8901 add r2, r9, r3 @ r2<- target address
8902 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
8922 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
8930 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
9029 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9034 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9057 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9062 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9083 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9088 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9109 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9114 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9135 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9140 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9161 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9166 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9187 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9192 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9213 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9218 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9239 * Returns StaticField pointer in r2.
9242 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9247 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9250 mov r2, r0 @ copy to r2
9268 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
9276 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9281 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9303 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9308 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9329 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9334 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9355 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9360 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9381 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9386 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9408 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
9413 ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
9425 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
9428 cmp r2, r3 @ compare (methodIndex, vtableCount)
9431 ldr r0, [r1, r2, lsl #2] @ r3<- vtable[methodIndex]
9436 mov r2, #METHOD_VIRTUAL @ resolver method type
9460 mov r2, #METHOD_DIRECT @ resolver method type
9472 mov r2, #METHOD_STATIC @ resolver method type
9481 ldrh r2, [rSELF, #offThread_subMode]
9483 ands r2, #kSubModeJitTraceBuild @ trace under construction?
9508 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
9513 ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
9525 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
9528 cmp r2, r3 @ compare (methodIndex, vtableCount)
9531 ldr r0, [r1, r2, lsl #2] @ r3<- vtable[methodIndex]
9536 mov r2, #METHOD_VIRTUAL @ resolver method type
9560 mov r2, #METHOD_DIRECT @ resolver method type
9572 mov r2, #METHOD_STATIC @ resolver method type
9581 ldrh r2, [rSELF, #offThread_subMode]
9583 ands r2, #kSubModeJitTraceBuild @ trace under construction?
9648 mov r2, #0 @ maxlong, as a double (low word)
9662 mov r2, #0 @ minlong, as a double (low word)
9671 mov r2, r4 @ compare against self
9696 mov r0, r0, asl r2 @ r0<- r0 << r2
9704 mov r1, r1, asr r2 @ r1<- r1 >> r2
9712 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
9752 mov r2, rINST, lsr #8 @ r2<- A+
9754 and r2, r2, #15 @ r2<- A
9756 SET_VREG(r0, r2) @ fp[A]<- r0
9789 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9794 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9815 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9820 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9847 mov r2, rINST, lsr #8 @ r2<- A+
9849 and r2, r2, #15 @ r2<- A
9851 SET_VREG(r0, r2) @ fp[A]<- r0
9871 mov r2, rINST, lsr #8 @ r2<- A+
9873 and r2, r2, #15 @ r2<- A
9874 add r3, rFP, r2, lsl #2 @ r3<- &fp[A]
9887 mov r2, rINST, lsr #8 @ r2<- A+
9889 and r2, r2, #15 @ r2<- A
9891 add r2, rFP, r2, lsl #2 @ r3<- &fp[A]
9894 ldmia r2, {r0-r1} @ r0/r1<- fp[A]
9897 add r2, r9, r3 @ r2<- target address
9898 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
9914 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9919 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9940 * Returns StaticField pointer in r2.
9943 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9948 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9951 mov r2, r0 @ copy to r2
9984 ldr r2, [rFP, ip, lsr #6] @ r2<- vE
10045 GET_VREG(r2, ip) @ r2<- vBase[2]
10129 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
10137 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
10148 ldr r2, [rSELF, #offThread_method] @ r2<- current method
10153 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
10173 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
10181 ldr r2, [rSELF, #offThread_method] @ r2<- current method
10186 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
10230 mov r2, rSELF @ arg2
10253 mov r2, rSELF @ arg2
10276 mov r2, rSELF @ arg2
10299 mov r2, rSELF @ arg2
10322 mov r2, rSELF @ arg2
10345 mov r2, rSELF @ arg2
10368 mov r2, rSELF @ arg2
10391 mov r2, rSELF @ arg2
10414 mov r2, rSELF @ arg2
10437 mov r2, rSELF @ arg2
10460 mov r2, rSELF @ arg2
10483 mov r2, rSELF @ arg2
10506 mov r2, rSELF @ arg2
10529 mov r2, rSELF @ arg2
10552 mov r2, rSELF @ arg2
10575 mov r2, rSELF @ arg2
10598 mov r2, rSELF @ arg2
10621 mov r2, rSELF @ arg2
10644 mov r2, rSELF @ arg2
10667 mov r2, rSELF @ arg2
10690 mov r2, rSELF @ arg2
10713 mov r2, rSELF @ arg2
10736 mov r2, rSELF @ arg2
10759 mov r2, rSELF @ arg2
10782 mov r2, rSELF @ arg2
10805 mov r2, rSELF @ arg2
10828 mov r2, rSELF @ arg2
10851 mov r2, rSELF @ arg2
10874 mov r2, rSELF @ arg2
10897 mov r2, rSELF @ arg2
10920 mov r2, rSELF @ arg2
10943 mov r2, rSELF @ arg2
10966 mov r2, rSELF @ arg2
10989 mov r2, rSELF @ arg2
11012 mov r2, rSELF @ arg2
11035 mov r2, rSELF @ arg2
11058 mov r2, rSELF @ arg2
11081 mov r2, rSELF @ arg2
11104 mov r2, rSELF @ arg2
11127 mov r2, rSELF @ arg2
11150 mov r2, rSELF @ arg2
11173 mov r2, rSELF @ arg2
11196 mov r2, rSELF @ arg2
11219 mov r2, rSELF @ arg2
11242 mov r2, rSELF @ arg2
11265 mov r2, rSELF @ arg2
11288 mov r2, rSELF @ arg2
11311 mov r2, rSELF @ arg2
11334 mov r2, rSELF @ arg2
11357 mov r2, rSELF @ arg2
11380 mov r2, rSELF @ arg2
11403 mov r2, rSELF @ arg2
11426 mov r2, rSELF @ arg2
11449 mov r2, rSELF @ arg2
11472 mov r2, rSELF @ arg2
11495 mov r2, rSELF @ arg2
11518 mov r2, rSELF @ arg2
11541 mov r2, rSELF @ arg2
11564 mov r2, rSELF @ arg2
11587 mov r2, rSELF @ arg2
11610 mov r2, rSELF @ arg2
11633 mov r2, rSELF @ arg2
11656 mov r2, rSELF @ arg2
11679 mov r2, rSELF @ arg2
11702 mov r2, rSELF @ arg2
11725 mov r2, rSELF @ arg2
11748 mov r2, rSELF @ arg2
11771 mov r2, rSELF @ arg2
11794 mov r2, rSELF @ arg2
11817 mov r2, rSELF @ arg2
11840 mov r2, rSELF @ arg2
11863 mov r2, rSELF @ arg2
11886 mov r2, rSELF @ arg2
11909 mov r2, rSELF @ arg2
11932 mov r2, rSELF @ arg2
11955 mov r2, rSELF @ arg2
11978 mov r2, rSELF @ arg2
12001 mov r2, rSELF @ arg2
12024 mov r2, rSELF @ arg2
12047 mov r2, rSELF @ arg2
12070 mov r2, rSELF @ arg2
12093 mov r2, rSELF @ arg2
12116 mov r2, rSELF @ arg2
12139 mov r2, rSELF @ arg2
12162 mov r2, rSELF @ arg2
12185 mov r2, rSELF @ arg2
12208 mov r2, rSELF @ arg2
12231 mov r2, rSELF @ arg2
12254 mov r2, rSELF @ arg2
12277 mov r2, rSELF @ arg2
12300 mov r2, rSELF @ arg2
12323 mov r2, rSELF @ arg2
12346 mov r2, rSELF @ arg2
12369 mov r2, rSELF @ arg2
12392 mov r2, rSELF @ arg2
12415 mov r2, rSELF @ arg2
12438 mov r2, rSELF @ arg2
12461 mov r2, rSELF @ arg2
12484 mov r2, rSELF @ arg2
12507 mov r2, rSELF @ arg2
12530 mov r2, rSELF @ arg2
12553 mov r2, rSELF @ arg2
12576 mov r2, rSELF @ arg2
12599 mov r2, rSELF @ arg2
12622 mov r2, rSELF @ arg2
12645 mov r2, rSELF @ arg2
12668 mov r2, rSELF @ arg2
12691 mov r2, rSELF @ arg2
12714 mov r2, rSELF @ arg2
12737 mov r2, rSELF @ arg2
12760 mov r2, rSELF @ arg2
12783 mov r2, rSELF @ arg2
12806 mov r2, rSELF @ arg2
12829 mov r2, rSELF @ arg2
12852 mov r2, rSELF @ arg2
12875 mov r2, rSELF @ arg2
12898 mov r2, rSELF @ arg2
12921 mov r2, rSELF @ arg2
12944 mov r2, rSELF @ arg2
12967 mov r2, rSELF @ arg2
12990 mov r2, rSELF @ arg2
13013 mov r2, rSELF @ arg2
13036 mov r2, rSELF @ arg2
13059 mov r2, rSELF @ arg2
13082 mov r2, rSELF @ arg2
13105 mov r2, rSELF @ arg2
13128 mov r2, rSELF @ arg2
13151 mov r2, rSELF @ arg2
13174 mov r2, rSELF @ arg2
13197 mov r2, rSELF @ arg2
13220 mov r2, rSELF @ arg2
13243 mov r2, rSELF @ arg2
13266 mov r2, rSELF @ arg2
13289 mov r2, rSELF @ arg2
13312 mov r2, rSELF @ arg2
13335 mov r2, rSELF @ arg2
13358 mov r2, rSELF @ arg2
13381 mov r2, rSELF @ arg2
13404 mov r2, rSELF @ arg2
13427 mov r2, rSELF @ arg2
13450 mov r2, rSELF @ arg2
13473 mov r2, rSELF @ arg2
13496 mov r2, rSELF @ arg2
13519 mov r2, rSELF @ arg2
13542 mov r2, rSELF @ arg2
13565 mov r2, rSELF @ arg2
13588 mov r2, rSELF @ arg2
13611 mov r2, rSELF @ arg2
13634 mov r2, rSELF @ arg2
13657 mov r2, rSELF @ arg2
13680 mov r2, rSELF @ arg2
13703 mov r2, rSELF @ arg2
13726 mov r2, rSELF @ arg2
13749 mov r2, rSELF @ arg2
13772 mov r2, rSELF @ arg2
13795 mov r2, rSELF @ arg2
13818 mov r2, rSELF @ arg2
13841 mov r2, rSELF @ arg2
13864 mov r2, rSELF @ arg2
13887 mov r2, rSELF @ arg2
13910 mov r2, rSELF @ arg2
13933 mov r2, rSELF @ arg2
13956 mov r2, rSELF @ arg2
13979 mov r2, rSELF @ arg2
14002 mov r2, rSELF @ arg2
14025 mov r2, rSELF @ arg2
14048 mov r2, rSELF @ arg2
14071 mov r2, rSELF @ arg2
14094 mov r2, rSELF @ arg2
14117 mov r2, rSELF @ arg2
14140 mov r2, rSELF @ arg2
14163 mov r2, rSELF @ arg2
14186 mov r2, rSELF @ arg2
14209 mov r2, rSELF @ arg2
14232 mov r2, rSELF @ arg2
14255 mov r2, rSELF @ arg2
14278 mov r2, rSELF @ arg2
14301 mov r2, rSELF @ arg2
14324 mov r2, rSELF @ arg2
14347 mov r2, rSELF @ arg2
14370 mov r2, rSELF @ arg2
14393 mov r2, rSELF @ arg2
14416 mov r2, rSELF @ arg2
14439 mov r2, rSELF @ arg2
14462 mov r2, rSELF @ arg2
14485 mov r2, rSELF @ arg2
14508 mov r2, rSELF @ arg2
14531 mov r2, rSELF @ arg2
14554 mov r2, rSELF @ arg2
14577 mov r2, rSELF @ arg2
14600 mov r2, rSELF @ arg2
14623 mov r2, rSELF @ arg2
14646 mov r2, rSELF @ arg2
14669 mov r2, rSELF @ arg2
14692 mov r2, rSELF @ arg2
14715 mov r2, rSELF @ arg2
14738 mov r2, rSELF @ arg2
14761 mov r2, rSELF @ arg2
14784 mov r2, rSELF @ arg2
14807 mov r2, rSELF @ arg2
14830 mov r2, rSELF @ arg2
14853 mov r2, rSELF @ arg2
14876 mov r2, rSELF @ arg2
14899 mov r2, rSELF @ arg2
14922 mov r2, rSELF @ arg2
14945 mov r2, rSELF @ arg2
14968 mov r2, rSELF @ arg2
14991 mov r2, rSELF @ arg2
15014 mov r2, rSELF @ arg2
15037 mov r2, rSELF @ arg2
15060 mov r2, rSELF @ arg2
15083 mov r2, rSELF @ arg2
15106 mov r2, rSELF @ arg2
15129 mov r2, rSELF @ arg2
15152 mov r2, rSELF @ arg2
15175 mov r2, rSELF @ arg2
15198 mov r2, rSELF @ arg2
15221 mov r2, rSELF @ arg2
15244 mov r2, rSELF @ arg2
15267 mov r2, rSELF @ arg2
15290 mov r2, rSELF @ arg2
15313 mov r2, rSELF @ arg2
15336 mov r2, rSELF @ arg2
15359 mov r2, rSELF @ arg2
15382 mov r2, rSELF @ arg2
15405 mov r2, rSELF @ arg2
15428 mov r2, rSELF @ arg2
15451 mov r2, rSELF @ arg2
15474 mov r2, rSELF @ arg2
15497 mov r2, rSELF @ arg2
15520 mov r2, rSELF @ arg2
15543 mov r2, rSELF @ arg2
15566 mov r2, rSELF @ arg2
15589 mov r2, rSELF @ arg2
15612 mov r2, rSELF @ arg2
15635 mov r2, rSELF @ arg2
15658 mov r2, rSELF @ arg2
15681 mov r2, rSELF @ arg2
15704 mov r2, rSELF @ arg2
15727 mov r2, rSELF @ arg2
15750 mov r2, rSELF @ arg2
15773 mov r2, rSELF @ arg2
15796 mov r2, rSELF @ arg2
15819 mov r2, rSELF @ arg2
15842 mov r2, rSELF @ arg2
15865 mov r2, rSELF @ arg2
15888 mov r2, rSELF @ arg2
15911 mov r2, rSELF @ arg2
15934 mov r2, rSELF @ arg2
15957 mov r2, rSELF @ arg2
15980 mov r2, rSELF @ arg2
16003 mov r2, rSELF @ arg2
16026 mov r2, rSELF @ arg2
16049 mov r2, rSELF @ arg2
16072 mov r2, rSELF @ arg2
16095 mov r2, rSELF @ arg2
16123 mov rFP, r2 @ restore Dalvik fp
16125 mov r2, #0
16126 str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
16133 mov r2,#kSVSPunt @ r2<- interpreter entry point
16145 mov r2,#kSVSSingleStep @ r2<- interpreter entry point
16152 mov r2,#kSVSNoProfile @ r2<- interpreter entry point
16160 mov r2,#kSVSTraceSelect @ r2<- interpreter entry point
16168 mov r2,#kSVSTraceSelect @ r2<- interpreter entry point
16176 mov r2,#kSVSBackwardBranch @ r2<- interpreter entry point
16184 mov r2,#kSVSNormal @ r2<- interpreter entry point
16192 mov r2,#kSVSNoChain @ r2<- interpreter entry point
16205 mov rFP, r2 @ restore Dalvik fp
16207 mov r2, #0
16208 str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
16311 movne r2,#kJitTSelectRequestHot @ ask for trace selection
16447 mov r2,#kJitTSelectRequest @ ask for trace selection
16450 moveq r2,#kJitTSelectRequest @ ask for trace selection
16471 * r2 is jit state.
16477 str r2,[rSELF,#offThread_jitState]
16507 mov r2,rSELF @ r2<- self (Thread) pointer
16518 * r2: self verification state
16532 mov r2,#kJitSelfVerification @ ask for self verification
16533 str r2,[rSELF,#offThread_jitState]
16584 movs r2, rINST, lsr #8 @ r2<- AA (arg count) -- test for zero
16590 @ r0=methodToCall, r1=CCCC, r2=count, r10=outs
16593 sub r10, r10, r2, lsl #2 @ r10<- "outs" area, for call args
16595 subs r2, r2, #1 @ count--
16614 movs r2, rINST, lsr #12 @ r2<- B (arg count) -- test for zero
16619 @ r0=methodToCall, r1=GFED, r2=count, r10=outs
16621 rsb r2, r2, #5 @ r2<- 5-r2
16622 add pc, pc, r2, lsl #4 @ computed goto, 4 instrs each
16625 ldr r2, [rFP, ip, lsr #6] @ r2<- vA (shift right 8, left 2)
16627 str r2, [r10, #-4]! @ *--outs = vA
16629 ldr r2, [rFP, ip, lsr #10] @ r2<- vG (shift right 12, left 2)
16631 str r2, [r10, #-4]! @ *--outs = vG
16633 ldr r2, [rFP, ip, lsr #6] @ r2<- vF
16635 str r2, [r10, #-4]! @ *--outs = vF
16637 ldr r2, [rFP, ip, lsr #2] @ r2<- vE
16639 str r2, [r10, #-4]! @ *--outs = vE
16641 ldr r2, [rFP, ip, lsl #2] @ r2<- vD
16643 str r2, [r10, #-4]! @ *--outs = vD
16649 ldr r2, [r0, #offMethod_insns] @ r2<- method->insns
16698 ldrh r9, [r2] @ r9 <- load INST from new PC
16700 mov rPC, r2 @ publish new rPC
16706 mov r2, #1
16707 r2, [rSELF, #offThread_debugIsMethodEntry]
16742 mov r2, r0 @ r2<- methodToCall
16760 ldr ip, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
16778 @ r0=newFp, r1=&retval, r2=methodToCall, r3=self, lr=subModes
16780 mov r0, r2 @ r0<- methodToCall
16782 mov r2, rFP
16787 ldr ip, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
16791 ldmfd sp!, {r0-r3} @ r2<- methodToCall (others unneeded)
16794 mov r0, r2 @ r0<- methodToCall
16796 mov r2, rFP
16826 mov r2, r0 @ A2<- methodToCall
16853 ldr r2, [rFP, #(offStackSaveArea_method - sizeofStackSaveArea)]
16854 @ r2<- method we're returning to
16855 cmp r2, #0 @ is this a break frame?
16859 ldr r10, [r2, #offMethod_clazz] @ r10<- method->clazz
16862 ldrne r10, [r2, #offMethod_clazz] @ r10<- method->clazz
16868 str r2, [rSELF, #offThread_method]@ self->method = newSave->method
16890 ldr r1, [r0, #offStackSaveArea_prevFrame] @ r2<- prevFP
16933 ldrh r2, [rSELF, #offThread_subMode] @ get subMode flags
16938 cmp r2, #0 @ any special subMode handling needed?
16950 mov r2, r9 @ r2<- exception
16978 ldr r2, [r1, #offMethod_clazz] @ r2<- method->clazz
16980 ldr r2, [r2, #offClassObject_pDvmDex] @ r2<- method->clazz->pDvmDex
16982 str r2, [rSELF, #offThread_methodClassDex] @ self->pDvmDex = meth...
17033 ldr r2, strExceptionNotCaughtLocally
17034 0: add r2, pc
17079 stmfd sp!, {r0-r2,lr} @ save regs
17083 ldmfd sp!, {r0-r2, lr}
17171 stmfd sp!, {r0, r1, r2, r3, ip, lr}
17176 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
17194 stmfd sp!, {r0, r1, r2, r3, ip, lr}
17199 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
17209 stmfd sp!, {r0, r1, r2, r3, ip, lr}
17213 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
17223 stmfd sp!, {r0, r1, r2, r3, ip, lr}
17228 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
17238 stmfd sp!, {r0, r1, r2, r3, ip, lr}
17240 mov r2, r0
17244 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
17254 stmfd sp!, {r0, r1, r2, r3, ip, lr}
17256 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
17265 stmfd sp!, {r0, r1, r2, r3, ip, lr}
17267 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
17281 fmrx r2, fpscr @ get VFP reg
17283 and r2, r2, r1 @ clear masked bits
17284 orr r2, r2, r0 @ set specified bits
17285 fmxr fpscr, r2 @ set VFP reg
17286 mov r0, r2 @ return new value
