Lines Matching refs:r2
314 ldr r2, [rSELF, #offThread_shadowSpace] @ to find out the jit exit state
316 ldr r3, [r2, #offShadowSpace_jitExitState] @ jit exit state
318 moveq r2,#kJitTSelectRequestHot @ ask for trace selection
400 GET_VREG(r2, r1) @ r2<- fp[B]
402 SET_VREG(r2, r0) @ fp[A]<- r2
414 GET_VREG(r2, r1) @ r2<- fp[BBBB]
416 SET_VREG(r2, r0) @ fp[AA]<- r2
428 GET_VREG(r2, r1) @ r2<- fp[BBBB]
430 SET_VREG(r2, r0) @ fp[AAAA]<- r2
440 ubfx r2, rINST, #8, #4 @ r2<- A
442 add r2, rFP, r2, lsl #2 @ r2<- &fp[A]
446 stmia r2, {r0-r1} @ fp[A]<- r0/r1
456 mov r2, rINST, lsr #8 @ r2<- AA
458 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
462 stmia r2, {r0-r1} @ fp[AA]<- r0/r1
472 FETCH(r2, 1) @ r2<- AAAA
474 add r2, rFP, r2, lsl #2 @ r2<- &fp[AAAA]
477 stmia r2, {r0-r1} @ fp[AAAA]<- r0/r1
491 GET_VREG(r2, r1) @ r2<- fp[B]
494 SET_VREG(r2, r0) @ fp[A]<- r2
508 GET_VREG(r2, r1) @ r2<- fp[BBBB]
510 SET_VREG(r2, r0) @ fp[AA]<- r2
524 GET_VREG(r2, r1) @ r2<- fp[BBBB]
526 SET_VREG(r2, r0) @ fp[AAAA]<- r2
536 mov r2, rINST, lsr #8 @ r2<- AA
540 SET_VREG(r0, r2) @ fp[AA]<- r0
548 mov r2, rINST, lsr #8 @ r2<- AA
550 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
553 stmia r2, {r0-r1} @ fp[AA]<- r0/r1
564 mov r2, rINST, lsr #8 @ r2<- AA
568 SET_VREG(r0, r2) @ fp[AA]<- r0
577 mov r2, rINST, lsr #8 @ r2<- AA
581 SET_VREG(r3, r2) @ fp[AA]<- exception obj
603 mov r2, rINST, lsr #8 @ r2<- AA
604 GET_VREG(r0, r2) @ r0<- vAA
617 mov r2, rINST, lsr #8 @ r2<- AA
618 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
620 ldmia r2, {r0-r1} @ r0/r1 <- vAA/vAA+1
636 mov r2, rINST, lsr #8 @ r2<- AA
637 GET_VREG(r0, r2) @ r0<- vAA
715 FETCH_S(r2, 2) @ r2<- ssssBBBB (high)
717 orr r0, r0, r2, lsl #16 @ r0<- BBBBbbbb
731 FETCH(r2, 3) @ r2<- hhhh (high middle)
735 orr r1, r2, r3, lsl #16 @ r1<- HHHHhhhh (high word)
763 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- self->methodClassDex
765 ldr r2, [r2, #offDvmDex_pResStrings] @ r2<- dvmDex->pResStrings
766 ldr r0, [r2, r1, lsl #2] @ r0<- pResStrings[BBBB]
781 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- self->methodClassDex
783 ldr r2, [r2, #offDvmDex_pResStrings] @ r2<- dvmDex->pResStrings
785 ldr r0, [r2, r1, lsl #2] @ r0<- pResStrings[BBBB]
799 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- self->methodClassDex
801 ldr r2, [r2, #offDvmDex_pResClasses] @ r2<- dvmDex->pResClasses
802 ldr r0, [r2, r1, lsl #2] @ r0<- pResClasses[BBBB]
818 mov r2, rINST, lsr #8 @ r2<- AA
819 GET_VREG(r1, r2) @ r1<- vAA (object)
841 mov r2, rINST, lsr #8 @ r2<- AA
843 GET_VREG(r1, r2) @ r1<- vAA (object)
866 FETCH(r2, 1) @ r2<- BBBB
872 ldr r1, [r0, r2, lsl #2] @ r1<- resolved class
900 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- pDvmDex
903 ldr r2, [r2, #offDvmDex_pResClasses] @ r2<- pDvmDex->pResClasses
904 ldr r1, [r2, r3, lsl #2] @ r1<- resolved class
921 ubfx r2, rINST, #8, #4 @ r2<- A
928 SET_VREG(r3, r2) @ vB<- length
971 FETCH(r2, 1) @ r2<- CCCC
976 ldr r0, [r3, r2, lsl #2] @ r0<- resolved class
1003 mov r2, #0 @ r2<- false
1031 mov r2, #0 @ r2<- false
1066 mov r2, rINST, lsr #8 @ r2<- AA
1067 GET_VREG(r1, r2) @ r1<- vAA (exception object)
1089 add r2, r1, r1 @ r2<- byte offset, set flags
1092 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1255 and r2, r0, #255 @ r2<- BB
1257 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
1259 flds s0, [r2] @ s0<- vBB
1294 and r2, r0, #255 @ r2<- BB
1296 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
1298 flds s0, [r2] @ s0<- vBB
1333 and r2, r0, #255 @ r2<- BB
1335 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
1337 fldd d0, [r2] @ d0<- vBB
1372 and r2, r0, #255 @ r2<- BB
1374 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
1376 fldd d0, [r2] @ d0<- vBB
1401 * subs ip, r0, r2
1403 * subeqs ip, r0, r2
1415 and r2, r0, #255 @ r2<- BB
1417 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
1419 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
1420 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
1424 subs r1, r0, r2 @ r1<- r0 - r2
1445 GET_VREG(r2, r0) @ r2<- vA
1447 cmp r2, r3 @ compare (vA, vB)
1449 adds r2, r1, r1 @ convert to bytes, check sign
1450 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1479 GET_VREG(r2, r0) @ r2<- vA
1481 cmp r2, r3 @ compare (vA, vB)
1483 adds r2, r1, r1 @ convert to bytes, check sign
1484 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1513 GET_VREG(r2, r0) @ r2<- vA
1515 cmp r2, r3 @ compare (vA, vB)
1517 adds r2, r1, r1 @ convert to bytes, check sign
1518 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1547 GET_VREG(r2, r0) @ r2<- vA
1549 cmp r2, r3 @ compare (vA, vB)
1551 adds r2, r1, r1 @ convert to bytes, check sign
1552 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1581 GET_VREG(r2, r0) @ r2<- vA
1583 cmp r2, r3 @ compare (vA, vB)
1585 adds r2, r1, r1 @ convert to bytes, check sign
1586 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1615 GET_VREG(r2, r0) @ r2<- vA
1617 cmp r2
1619 adds r2, r1, r1 @ convert to bytes, check sign
1620 FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
1647 GET_VREG(r2, r0) @ r2<- vAA
1649 cmp r2, #0 @ compare (vA, 0)
1679 GET_VREG(r2, r0) @ r2<- vAA
1681 cmp r2, #0 @ compare (vA, 0)
1711 GET_VREG(r2, r0) @ r2<- vAA
1713 cmp r2, #0 @ compare (vA, 0)
1743 GET_VREG(r2, r0) @ r2<- vAA
1745 cmp r2, #0 @ compare (vA, 0)
1775 GET_VREG(r2, r0) @ r2<- vAA
1777 cmp r2, #0 @ compare (vA, 0)
1807 GET_VREG(r2, r0) @ r2<- vAA
1809 cmp r2, #0 @ compare (vA, 0)
1886 FETCH_B(r2, 1, 0) @ r2<- BB
1889 GET_VREG(r0, r2) @ r0<- vBB (array object)
1898 ldr r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
1900 SET_VREG(r2, r9) @ vAA<- r2
1915 and r2, r0, #255 @ r2<- BB
1917 GET_VREG(r0, r2) @ r0<- vBB (array object)
1944 FETCH_B(r2, 1, 0) @ r2<- BB
1947 GET_VREG(r0, r2) @ r0<- vBB (array object)
1956 ldr r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
1958 SET_VREG(r2, r9) @ vAA<- r2
1976 FETCH_B(r2, 1, 0) @ r2<- BB
1979 GET_VREG(r0, r2) @ r0<- vBB (array object)
1988 ldrb r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
1990 SET_VREG(r2, r9) @ vAA<- r2
2008 FETCH_B(r2, 1, 0) @ r2<- BB
2011 GET_VREG(r0, r2) @ r0<- vBB (array object)
2020 ldrsb r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
2022 SET_VREG(r2, r9) @ vAA<- r2
2040 FETCH_B(r2, 1, 0) @ r2<- BB
2043 GET_VREG(r0, r2) @ r0<- vBB (array object)
2052 ldrh r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
2054 SET_VREG(r2, r9) @ vAA<- r2
2072 FETCH_B(r2, 1, 0) @ r2<- BB
2075 GET_VREG(r0, r2) @ r0<- vBB (array object)
2084 ldrsh r2, [r0, #offArrayObject_contents] @ r2<- vBB[vCC]
2086 SET_VREG(r2, r9) @ vAA<- r2
2103 FETCH_B(r2, 1, 0) @ r2<- BB
2106 GET_VREG(r0, r2) @ r0<- vBB (array object)
2115 GET_VREG(r2, r9) @ r2<- vAA
2117 str r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2132 and r2, r0, #255 @ r2<- BB
2134 GET_VREG(r0, r2) @ r0<- vBB (array object)
2158 and r2, r0, #255 @ r2<- BB
2160 GET_VREG(rINST, r2) @ rINST<- vBB (array object)
2186 FETCH_B(r2, 1, 0) @ r2<- BB
2189 GET_VREG(r0, r2) @ r0<- vBB (array object)
2198 GET_VREG(r2, r9) @ r2<- vAA
2200 strb r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2218 FETCH_B(r2, 1, 0) @ r2<- BB
2221 GET_VREG(r0, r2) @ r0<- vBB (array object)
2230 GET_VREG(r2, r9) @ r2<- vAA
2232 strb r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2250 FETCH_B(r2, 1, 0) @ r2<- BB
2253 GET_VREG(r0, r2) @ r0<- vBB (array object)
2262 GET_VREG(r2, r9) @ r2<- vAA
2264 strh r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2282 FETCH_B(r2, 1, 0) @ r2<- BB
2285 GET_VREG(r0, r2) @ r0<- vBB (array object)
2294 GET_VREG(r2, r9) @ r2<- vAA
2296 strh r2, [r0, #offArrayObject_contents] @ vBB[vCC]<- r2
2313 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2315 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2318 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2320 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2337 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
2339 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2342 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2344 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2364 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2366 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2369 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2371 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2393 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2395 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2398 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2400 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2422 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2424 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2427 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2429 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2451 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2453 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2456 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2458 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2480 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2482 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2485 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2487 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2507 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2509 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2512 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2514 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2528 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
2530 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2533 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2535 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2554 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2556 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2559 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2561 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2582 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2584 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2587 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2589 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2611 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2613 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2616 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2618 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2640 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2642 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2645 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2647 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2669 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
2671 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
2674 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
2676 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
2693 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2695 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2702 mov r2, rINST, lsr #8 @ r2<- AA
2704 SET_VREG(r1, r2) @ fp[AA]<- r1
2716 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2718 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2747 ldr r2r2<- DvmDex
2749 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2756 mov r2, rINST, lsr #8 @ r2<- AA
2758 SET_VREG(r1, r2) @ fp[AA]<- r1
2774 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2776 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2783 mov r2, rINST, lsr #8 @ r2<- AA
2785 SET_VREG(r1, r2) @ fp[AA]<- r1
2801 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2803 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2810 mov r2, rINST, lsr #8 @ r2<- AA
2812 SET_VREG(r1, r2) @ fp[AA]<- r1
2828 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2830 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2837 mov r2, rINST, lsr #8 @ r2<- AA
2839 SET_VREG(r1, r2) @ fp[AA]<- r1
2855 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2857 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2864 mov r2, rINST, lsr #8 @ r2<- AA
2866 SET_VREG(r1, r2) @ fp[AA]<- r1
2881 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2883 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2888 mov r2, rINST, lsr #8 @ r2<- AA
2890 GET_VREG(r1, r2) @ r1<- fp[AA]
2909 ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
2911 cmp r2, #0 @ is resolved entry null?
2913 .LOP_SPUT_WIDE_finish: @ field ptr in r2, AA in r9
2918 add r2, r2, #offStaticField_value @ r2<- pointer to data
2919 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
2921 strd r0, [r2, #offStaticField_value] @ field<- vAA/vAA+1
2935 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2937 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2942 mov r2, rINST, lsr #8 @ r2<- AA
2944 GET_VREG(r1, r2) @ r1<- fp[AA]
2945 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
2962 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2964 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2969 mov r2, rINST, lsr #8 @ r2<- AA
2971 GET_VREG(r1, r2) @ r1<- fp[AA]
2990 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
2992 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
2997 mov r2, rINST, lsr #8 @ r2<- AA
2999 GET_VREG(r1, r2) @ r1<- fp[AA]
3018 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
3020 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
3025 mov r2, rINST, lsr #8 @ r2<- AA
3027 GET_VREG(r1, r2) @ r1<- fp[AA]
3046 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
3048 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
3053 mov r2, rINST, lsr #8 @ r2<- AA
3055 GET_VREG(r1, r2) @ r1<- fp[AA]
3087 mov r2, #METHOD_VIRTUAL @ resolver method type
3190 FETCH(r2, 2) @ r2<- FEDC or CCCC
3193 and r2, r2, #15 @ r2<- C (or stays CCCC)
3196 GET_VREG(r9, r2) @ r9<- first arg ("this")
3199 ldr r2, [rSELF, #offThread_method] @ r2<- method
3240 mov r2, #METHOD_VIRTUAL @ resolver method type
3351 FETCH(r2, 2) @ r2<- FEDC or CCCC
3354 and r2, r2, #15 @ r2<- C (or stays CCCC)
3357 GET_VREG(r9, r2) @ r9<- first arg ("this")
3360 ldr r2, [rSELF, #offThread_method] @ r2<- method
3457 rsc r1, r1, #0 @ r0/r1<- op, r2-r3 changed
3484 mvn r1, r1 @ r0/r1<- op, r2-r3 changed
3537 add r1, r1, #0x80000000 @ r0/r1<- op, r2-r3 changed
3631 GET_VREG(r2, r1) @ r2<- fp[B]
3634 SET_VREG(r2, r0) @ fp[A]<- r2
3687 bl __aeabi_l2d @ r0/r1<- op, r2-r3 changed
3818 bl d2l_doconv @ r0/r1<- op, r2-r3 changed
3953 and r2, r0, #255 @ r2<- BB
3955 GET_VREG(r0, r2) @ r0<- vBB
3994 and r2, r0, #255 @ r2<- BB
3996 GET_VREG(r0, r2) @ r0<- vBB
4036 and r2, r0, #255 @ r2<- BB
4038 GET_VREG(r0, r2) @ r0<- vBB
4077 and r2, r0, #255 @ r2<- BB
4079 GET_VREG(r0, r2) @ r0<- vBB
4119 and r2, r0, #255 @ r2<- BB
4121 GET_VREG(r0, r2) @ r0<- vBB
4160 and r2, r0, #255 @ r2<- BB
4162 GET_VREG(r0, r2) @ r0<- vBB
4201 and r2, r0, #255 @ r2<- BB
4203 GET_VREG(r0, r2) @ r0<- vBB
4242 and r2, r0, #255 @ r2<- BB
4244 GET_VREG(r0, r2) @ r0<- vBB
4283 and r2, r0, #255 @ r2<- BB
4285 GET_VREG(r0, r2) @ r0<- vBB
4324 and r2, r0, #255 @ r2<- BB
4326 GET_VREG(r0, r2) @ r0<- vBB
4365 and r2, r0, #255 @ r2<- BB
4367 GET_VREG(r0, r2) @ r0<- vBB
4389 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4405 and r2, r0, #255 @ r2<- BB
4408 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4410 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4411 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4413 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4418 adds r0, r0, r2 @ optional op; may set condition codes
4433 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4449 and r2, r0, #255 @ r2<- BB
4452 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4454 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4455 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4457 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4462 subs r0, r0, r2 @ optional op; may set condition codes
4494 and r2, r0, #255 @ r2<- BB
4496 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4498 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4499 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4500 mul ip, r2, r1 @ ip<- ZxW
4501 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
4502 mla r2, r0, r3, ip @ r2<- YxX + (ZxW)
4504 add r10, r2, r10 @ r10<- r10 + low(ZxW + (YxX))
4516 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4532 and r2, r0, #255 @ r2<- BB
4535 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4537 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4538 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4540 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4557 /* ldivmod returns quotient in r0/r1 and remainder in r2/r3 */
4561 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4577 and r2, r0, #255 @ r2<- BB
4580 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4582 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4583 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4585 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4593 stmia r9, {r2,r3} @ vAA/vAA+1<- r2/r3
4605 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4621 and r2, r0, #255 @ r2<- BB
4624 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4626 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4627 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4629 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4634 and r0, r0, r2 @ optional op; may set condition codes
4649 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4665 and r2r2<- BB
4668 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4670 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4671 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4673 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4678 orr r0, r0, r2 @ optional op; may set condition codes
4693 * specifies an instruction that performs "result = r0-r1 op r2-r3".
4709 and r2, r0, #255 @ r2<- BB
4712 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
4714 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
4715 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
4717 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
4722 eor r0, r0, r2 @ optional op; may set condition codes
4746 GET_VREG(r2, r0) @ r2<- vCC
4748 and r2, r2, #63 @ r2<- r2 & 0x3f
4751 mov r1, r1, asl r2 @ r1<- r1 << r2
4752 rsb r3, r2, #32 @ r3<- 32 - r2
4753 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
4754 subs ip, r2, #32 @ ip<- r2 - 32
4755 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
4775 GET_VREG(r2, r0) @ r2<- vCC
4777 and r2, r2, #63 @ r0<- r0 & 0x3f
4780 mov r0, r0, lsr r2 @ r0<- r2 >> r2
4781 rsb r3, r2, #32 @ r3<- 32 - r2
4782 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
4783 subs ip, r2, #32 @ ip<- r2 - 32
4784 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
4804 GET_VREG(r2, r0) @ r2<- vCC
4806 and r2, r2, #63 @ r0<- r0 & 0x3f
4809 mov r0, r0, lsr r2 @ r0<- r2 >> r2
4810 rsb r3, r2, #32 @ r3<- 32 - r2
4811 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
4812 subs ip, r2, #32 @ ip<- r2 - 32
4813 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
4833 and r2, r0, #255 @ r2<- BB
4835 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
4837 flds s0, [r2] @ s0<- vBB
4863 and r2, r0, #255 @ r2<- BB
4865 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
4867 flds s0, [r2] @ s0<- vBB
4893 and r2, r0, #255 @ r2<- BB
4895 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
4897 flds s0, [r2] @ s0<- vBB
4923 and r2, r0, #255 @ r2<- BB
4925 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
4927 flds s0, [r2] @ s0<- vBB
4962 and r2, r0, #255 @ r2<- BB
4964 GET_VREG(r0, r2) @ r0<- vBB
4995 and r2, r0, #255 @ r2<- BB
4997 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
4999 fldd d0, [r2] @ d0<- vBB
5025 and r2, r0, #255 @ r2<- BB
5027 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
5029 fldd d0, [r2] @ d0<- vBB
5055 and r2, r0, #255 @ r2<- BB
5057 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
5059 fldd d0, [r2] @ d0<- vBB
5085 and r2, r0, #255 @ r2<- BB
5087 VREG_INDEX_TO_ADDR(r2, r2) @ r2<- &vBB
5089 fldd d0, [r2] @ d0<- vBB
5107 * specifies an instruction that performs "result = r0-r1 op r2-r3".
5123 and r2, r0, #255 @ r2<- BB
5126 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
5128 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
5129 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
5131 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5571 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5588 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5591 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5596 adds r0, r0, r2 @ optional op; may set condition codes
5611 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5628 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5631 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5636 subs r0, r0, r2 @ optional op; may set condition codes
5661 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5663 mul ip, r2, r1 @ ip<- ZxW
5664 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
5665 mla r2, r0, r3, ip @ r2<- YxX + (ZxW)
5668 add r10, r2, r10 @ r10<- r10 + low(ZxW + (YxX))
5680 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5697 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5700 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5717 /* ldivmod returns quotient in r0/r1 and remainder in r2/r3 */
5721 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5738 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5741 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5749 stmia r9, {r2,r3} @ vAA/vAA+1<- r2/r3
5761 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5778 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5781 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5786 and r0, r0, r2 @ optional op; may set condition codes
5801 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5818 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5821 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5826 orr r0, r0, r2 @ optional op; may set condition codes
5841 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5858 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
5861 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
5866 eor r0, r0, r2 @ optional op; may set condition codes
5885 GET_VREG(r2, r3) @ r2<- vB
5887 and r2, r2, #63 @ r2<- r2 & 0x3f
5890 mov r1, r1, asl r2 @ r1<- r1 << r2
5891 rsb r3, r2, #32 @ r3<- 32 - r2
5892 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
5893 subs ip, r2, #32 @ ip<- r2 - 32
5895 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
5896 mov r0, r0, asl r2 @ r0<- r0 << r2
5910 GET_VREG(r2, r3) @ r2<- vB
5912 and r2, r2, #63 @ r2<- r2 & 0x3f
5915 mov r0, r0, lsr r2 @ r0<- r2 >> r2
5916 rsb r3, r2, #32 @ r3<- 32 - r2
5917 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
5918 subs ip, r2, #32 @ ip<- r2 - 32
5920 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
5921 mov r1, r1, asr r2 @ r1<- r1 >> r2
5935 GET_VREG(r2, r3) @ r2<- vB
5937 and r2, r2, #63 @ r2<- r2 & 0x3f
5940 mov r0, r0, lsr r2 @ r0<- r2 >> r2
5941 rsb r3, r2, #32 @ r3<- 32 - r2
5942 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
5943 subs ip, r2, #32 @ ip<- r2 - 32
5945 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
5946 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
6224 * that specifies an instruction that performs "result = r0-r1 op r2-r3".
6241 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1
6244 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
6276 mov r2, rINST, lsr #12 @ r2<- B
6278 GET_VREG(r0, r2) @ r0<- vB
6312 mov r2, rINST, lsr #12 @ r2<- B
6314 GET_VREG(r0, r2) @ r0<- vB
6348 mov r2, rINST, lsr #12 @ r2<- B
6350 GET_VREG(r0, r2) @ r0<- vB
6383 mov r2, rINST, lsr #12 @ r2<- B
6385 GET_VREG(r0, r2) @ r0<- vB
6419 mov r2, rINST, lsr #12 @ r2<- B
6421 GET_VREG(r0, r2) @ r0<- vB
6454 mov r2, rINST, lsr #12 @ r2<- B
6456 GET_VREG(r0, r2) @ r0<- vB
6489 mov r2, rINST, lsr #12 @ r2<- B
6491 GET_VREG(r0, r2) @ r0<- vB
6524 mov r2, rINST, lsr #12 @ r2<- B
6526 GET_VREG(r0, r2) @ r0<- vB
6561 and r2, r3, #255 @ r2<- BB
6562 GET_VREG(r0, r2) @ r0<- vBB
6599 and r2, r3, #255 @ r2<- BB
6600 GET_VREG(r0, r2) @ r0<- vBB
6638 and r2, r3, #255 @ r2<- BB
6639 GET_VREG(r0, r2) @ r0<- vBB
6676 and r2, r3, #255 @ r2<- BB
6677 GET_VREG(r0, r2) @ r0<- vBB
6715 and r2, r3, #255 @ r2<- BB
6716 GET_VREG(r0, r2) @ r0<- vBB
6753 and r2, r3, #255 @ r2<- BB
6754 GET_VREG(r0, r2) @ r0<- vBB
6791 and r2, r3, #255 @ r2<- BB
6792 GET_VREG(r0, r2) @ r0<- vBB
6829 and r2, r3, #255 @ r2<- BB
6830 GET_VREG(r0, r2) @ r0<- vBB
6867 and r2, r3, #255 @ r2<- BB
6868 GET_VREG(r0, r2) @ r0<- vBB
6905 and r2, r3, #255 @ r2<- BB
6906 GET_VREG(r0, r2) @ r0<- vBB
6943 and r2, r3, #255 @ r2<- BB
6944 GET_VREG(r0, r2) @ r0<- vBB
6974 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
6976 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
6979 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
6981 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7002 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
7004 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7007 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7009 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7027 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7029 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7036 mov r2, rINST, lsr #8 @ r2<- AA
7038 SET_VREG(r1, r2) @ fp[AA]<- r1
7054 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7056 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7061 mov r2, rINST, lsr #8 @ r2<- AA
7063 GET_VREG(r1, r2) @ r1<- fp[AA]
7085 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
7087 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7090 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7092 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7111 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
7113 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7116 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7118 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7134 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
7136 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7139 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7141 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7157 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7159 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7191 ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
7193 cmp r2, #0 @ is resolved entry null?
7195 .LOP_SPUT_WIDE_VOLATILE_finish: @ field ptr in r2, AA in r9
7200 add r2, r2, #offStaticField_value @ r2<- pointer to data
7201 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
7203 strd r0, [r2, #offStaticField_value] @ field<- vAA/vAA+1
7238 FETCH(r2, 1) @ r2<- BBBB
7262 ldrh r2, [rSELF, #offThread_subMode]
7265 ands r2, #kSubModeDebugProfile @ Any going on?
7296 ldrh r2, [rSELF, #offThread_subMode]
7299 ands r2, #kSubModeDebugProfile @ Any going on?
7328 ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
7329 tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
7352 mov r2, rINST, lsr #12 @ r2<- B
7354 GET_VREG(r3, r2) @ r3<- object we're operating on
7355 ubfx r2, rINST, #8, #4 @ r2<- A
7360 SET_VREG(r0, r2) @ fp[A]<- r0
7369 mov r2, rINST, lsr #12 @ r2<- B
7371 GET_VREG(r3, r2) @ r3<- object we're operating on
7372 ubfx r2, rINST, #8, #4 @ r2<- A
7377 add r3, rFP, r2, lsl #2 @ r3<- &fp[A]
7389 mov r2, rINST, lsr #12 @ r2<- B
7390 GET_VREG(r3, r2) @ r3<- object we're operating on
7393 mov r2, rINST, lsr #8 @ r2<- A(+)
7397 and r2, r2, #15
7399 SET_VREG(r0, r2) @ fp[A]<- r0
7409 mov r2, rINST, lsr #12 @ r2<- B
7411 GET_VREG(r3, r2) @ r3<- fp[B], the object pointer
7412 ubfx r2, rINST, #8, #4 @ r2<- A
7415 GET_VREG(r0, r2) @ r0<- fp[A]
7428 GET_VREG(r2, r1) @ r2<- fp[B], the object pointer
7430 cmp r2, #0 @ check object for null
7435 strd r0, [r2, r3] @ obj.field (64 bits, aligned)<- r0/r1
7445 mov r2, rINST, lsr #12 @ r2<- B
7446 GET_VREG(r3, r2) @ r3<- fp[B], the object pointer
7449 mov r2, rINST, lsr #8 @ r2<- A(+)
7451 and r2, r2, #15
7452 GET_VREG(r0, r2) @ r0<- fp[A]
7453 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
7457 strneb r2, [r2, r3, lsr #GC_CARD_SHIFT] @ mark card based on obj head
7480 ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
7481 ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
7483 ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
7506 ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
7507 ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
7509 ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
7525 ldr r2, [rSELF, #offThread_method] @ r2<- current method
7530 ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
7532 ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
7534 ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
7536 ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
7553 ldr r2, [rSELF, #offThread_method] @ r2<- current method
7558 ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
7560 ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
7562 ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
7564 ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
7583 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
7585 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
7588 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
7590 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
7608 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7610 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7617 mov r2, rINST, lsr #8 @ r2<- AA
7619 SET_VREG(r1, r2) @ fp[AA]<- r1
7635 ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
7637 ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
7642 mov r2, rINST, lsr #8 @ r2<- AA
7644 GET_VREG(r1, r2) @ r1<- fp[AA]
7645 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
7724 mov r2, #1 @ r2<- true
7758 * r2 holds BBBB
7764 mov r1, r2 @ r1<- BBBB
7765 mov r2, #0 @ r2<- false
7818 mov r2, #1 @ r2<- true
7894 mov r2, #0 @ r2<- false
7908 * r2 holds class ref CCCC
7913 mov r1, r2 @ r1<- CCCC
7914 mov r2, #0 @ r2<- false
7929 mov r2, #ALLOC_DONT_TRACK @ don't track in local refs table
7932 mov r2, rINST, lsr #8 @ r2<- A+
7935 and r2, r2, #15 @ r2<- A
7937 SET_VREG(r0, r2) @ vA<- r0
7949 mov r2, #ALLOC_DONT_TRACK @ r2<- alloc flags
7976 add r2, rFP, r1, lsl #2 @ r2<- &fp[CCCC]
7977 1: ldr r3, [r2], #4 @ r3<- *r2++
7984 and r2, r10, #15 @ r2<- A
7986 GET_VREG(r3, r2) @ r3<- vA
7989 1: and r2, r1, #15 @ r2<- F/E/D/C
7990 GET_VREG(r3, r2) @ r3<- vF/vE/vD/vC
8001 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
8004 strneb r2, [r2, r0, lsr #GC_CARD_SHIFT] @ Mark card based on object head
8034 mov r2, #ALLOC_DONT_TRACK @ r2<- alloc flags
8061 add r2, rFP, r1, lsl #2 @ r2<- &fp[CCCC]
8062 1: ldr r3, [r2], #4 @ r3<- *r2++
8069 and r2, r10, #15 @ r2<- A
8071 GET_VREG(r3, r2) @ r3<- vA
8074 1: and r2, r1, #15 @ r2<- F/E/D/C
8075 GET_VREG(r3, r2) @ r3<- vF/vE/vD/vC
8086 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
8089 strneb r2, [r2, r0, lsr #GC_CARD_SHIFT] @ Mark card based on object head
8155 ldrd r2, [r0, #offArrayObject_contents] @ r2/r3<- vBB[vCC]
8158 stmia r9, {r2-r3} @ vAA/vAA+1<- r2/r3
8165 ldmia r9, {r2-r3} @ r2/r3<- vAA/vAA+1
8167 strd r2, [r0, #offArrayObject_contents] @ r2/r3<- vBB[vCC]
8187 ldr r2, [rSELF, #offThread_cardTable] @ get biased CT base
8191 strb r2, [r2, r1, lsr #GC_CARD_SHIFT] @ mark card using object head
8219 ubfx r2, rINST, #8, #4 @ r2<- A
8221 SET_VREG(r0, r2) @ fp[A]<- r0
8237 ubfx r2, rINST, #8, #4 @ r2<- A
8239 add r3, rFP, r2, lsl #2 @ r3<- &fp[A]
8258 mov r2, rINST, lsr #8 @ r2<- A+
8260 and r2, r2, #15 @ r2<- A
8262 SET_VREG(r0, r2) @ fp[A]<- r0
8279 mov r2, rINST, lsr #8 @ r2<- A+
8281 and r2, r2, #15 @ r2<- A
8283 SET_VREG(r0, r2) @ fp[A]<- r0
8300 mov r2, rINST, lsr #8 @ r2<- A+
8302 and r2, r2, #15 @ r2<- A
8304 SET_VREG(r0, r2) @ fp[A]<- r0
8321 mov r2, rINST, lsr #8 @ r2<- A+
8323 and r2, r2, #15 @ r2<- A
8325 SET_VREG(r0, r2) @ fp[A]<- r0
8342 mov r2, rINST, lsr #8 @ r2<- A+
8344 and r2, r2, #15 @ r2<- A
8346 SET_VREG(r0, r2) @ fp[A]<- r0
8376 ubfx r2, rINST, #8, #4 @ r2<- A
8379 add r2, rFP, r2, lsl #2 @ r3<- &fp[A]
8382 ldmia r2, {r0-r1} @ r0/r1<- fp[A]
8401 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
8409 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
8508 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8513 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8536 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8541 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8562 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8567 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8588 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8593 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8614 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8619 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8640 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8645 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8666 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8671 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8692 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8697 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8718 * Returns StaticField pointer in r2.
8721 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8726 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8729 mov r2, r0 @ copy to r2
8747 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
8755 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8760 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8782 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8787 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8808 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8813 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8834 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8839 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8860 ldr r2, [rSELF, #offThread_method] @ r2<- current method
8865 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
8887 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
8892 ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
8904 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
8907 cmp r2, r3 @ compare (methodIndex, vtableCount)
8910 ldr r0, [r1, r2, lsl #2] @ r3<- vtable[methodIndex]
8915 mov r2, #METHOD_VIRTUAL @ resolver method type
8939 mov r2, #METHOD_DIRECT @ resolver method type
8951 mov r2, #METHOD_STATIC @ resolver method type
8960 ldrh r2, [rSELF, #offThread_subMode]
8962 ands r2, #kSubModeJitTraceBuild @ trace under construction?
8987 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
8992 ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
9004 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
9007 cmp r2, r3 @ compare (methodIndex, vtableCount)
9010 ldr r0, [r1, r2, lsl #2] @ r3<- vtable[methodIndex]
9015 mov r2, #METHOD_VIRTUAL @ resolver method type
9039 mov r2, #METHOD_DIRECT @ resolver method type
9051 mov r2, #METHOD_STATIC @ resolver method type
9060 ldrh r2, [rSELF, #offThread_subMode]
9062 ands r2, #kSubModeJitTraceBuild @ trace under construction?
9127 mov r2, #0 @ maxlong, as a double (low word)
9141 mov r2, #0 @ minlong, as a double (low word)
9150 mov r2, r4 @ compare against self
9175 mov r0, r0, asl r2 @ r0<- r0 << r2
9183 mov r1, r1, asr r2 @ r1<- r1 >> r2
9191 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
9231 mov r2, rINST, lsr #8 @ r2<- A+
9233 and r2, r2, #15 @ r2<- A
9235 SET_VREG(r0, r2) @ fp[A]<- r0
9268 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9273 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9294 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9299 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9326 mov r2, rINST, lsr #8 @ r2<- A+
9328 and r2, r2, #15 @ r2<- A
9330 SET_VREG(r0, r2) @ fp[A]<- r0
9350 mov r2, rINST, lsr #8 @ r2<- A+
9352 and r2, r2, #15 @ r2<- A
9353 add r3, rFP, r2, lsl #2 @ r3<- &fp[A]
9366 mov r2, rINST, lsr #8 @ r2<- A+
9368 and r2, r2, #15 @ r2<- A
9370 add r2, rFP, r2, lsl #2 @ r3<- &fp[A]
9373 ldmia r2, {r0-r1} @ r0/r1<- fp[A]
9376 add r2, r9, r3 @ r2<- target address
9377 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
9393 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9398 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9419 * Returns StaticField pointer in r2.
9422 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9427 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9430 mov r2, r0 @ copy to r2
9463 ldr r2, [rFP, ip, lsr #6] @ r2<- vE
9524 GET_VREG(r2, ip) @ r2<- vBase[2]
9608 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
9616 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
9627 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9632 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9652 strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
9660 ldr r2, [rSELF, #offThread_method] @ r2<- current method
9665 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
9709 mov r2, rSELF @ arg2
9732 mov r2, rSELF @ arg2
9755 mov r2, rSELF @ arg2
9778 mov r2, rSELF @ arg2
9801 mov r2, rSELF @ arg2
9824 mov r2, rSELF @ arg2
9847 mov r2, rSELF @ arg2
9870 mov r2, rSELF @ arg2
9893 mov r2, rSELF @ arg2
9916 mov r2, rSELF @ arg2
9939 mov r2, rSELF @ arg2
9962 mov r2, rSELF @ arg2
9985 mov r2, rSELF @ arg2
10008 mov r2, rSELF @ arg2
10031 mov r2, rSELF @ arg2
10054 mov r2, rSELF @ arg2
10077 mov r2, rSELF @ arg2
10100 mov r2, rSELF @ arg2
10123 mov r2, rSELF @ arg2
10146 mov r2, rSELF @ arg2
10169 mov r2, rSELF @ arg2
10192 mov r2, rSELF @ arg2
10215 mov r2, rSELF @ arg2
10238 mov r2, rSELF @ arg2
10261 mov r2, rSELF @ arg2
10284 mov r2, rSELF @ arg2
10307 mov r2, rSELF @ arg2
10330 mov r2, rSELF @ arg2
10353 mov r2, rSELF @ arg2
10376 mov r2, rSELF @ arg2
10399 mov r2, rSELF @ arg2
10422 mov r2, rSELF @ arg2
10445 mov r2, rSELF @ arg2
10468 mov r2, rSELF @ arg2
10491 mov r2, rSELF @ arg2
10514 mov r2, rSELF @ arg2
10537 mov r2, rSELF @ arg2
10560 mov r2, rSELF @ arg2
10583 mov r2, rSELF @ arg2
10606 mov r2, rSELF @ arg2
10629 mov r2, rSELF @ arg2
10652 mov r2, rSELF @ arg2
10675 mov r2, rSELF @ arg2
10698 mov r2, rSELF @ arg2
10721 mov r2, rSELF @ arg2
10744 mov r2, rSELF @ arg2
10767 mov r2, rSELF @ arg2
10790 mov r2, rSELF @ arg2
10813 mov r2, rSELF @ arg2
10836 mov r2, rSELF @ arg2
10859 mov r2, rSELF @ arg2
10882 mov r2, rSELF @ arg2
10905 mov r2, rSELF @ arg2
10928 mov r2, rSELF @ arg2
10951 mov r2, rSELF @ arg2
10974 mov r2, rSELF @ arg2
10997 mov r2, rSELF @ arg2
11020 mov r2, rSELF @ arg2
11043 mov r2, rSELF @ arg2
11066 mov r2, rSELF @ arg2
11089 mov r2, rSELF @ arg2
11112 mov r2, rSELF @ arg2
11135 mov r2, rSELF @ arg2
11158 mov r2, rSELF @ arg2
11181 mov r2, rSELF @ arg2
11204 mov r2, rSELF @ arg2
11227 mov r2, rSELF @ arg2
11250 mov r2, rSELF @ arg2
11273 mov r2, rSELF @ arg2
11296 mov r2, rSELF @ arg2
11319 mov r2, rSELF @ arg2
11342 mov r2, rSELF @ arg2
11365 mov r2, rSELF @ arg2
11388 mov r2, rSELF @ arg2
11411 mov r2, rSELF @ arg2
11434 mov r2, rSELF @ arg2
11457 mov r2, rSELF @ arg2
11480 mov r2, rSELF @ arg2
11503 mov r2, rSELF @ arg2
11526 mov r2, rSELF @ arg2
11549 mov r2, rSELF @ arg2
11572 mov r2, rSELF @ arg2
11595 mov r2, rSELF @ arg2
11618 mov r2, rSELF @ arg2
11641 mov r2, rSELF @ arg2
11664 mov r2, rSELF @ arg2
11687 mov r2, rSELF @ arg2
11710 mov r2, rSELF @ arg2
11733 mov r2, rSELF @ arg2
11756 mov r2, rSELF @ arg2
11779 mov r2, rSELF @ arg2
11802 mov r2, rSELF @ arg2
11825 mov r2, rSELF @ arg2
11848 mov r2, rSELF @ arg2
11871 mov r2, rSELF @ arg2
11894 mov r2, rSELF @ arg2
11917 mov r2, rSELF @ arg2
11940 mov r2, rSELF @ arg2
11963 mov r2, rSELF @ arg2
11986 mov r2, rSELF @ arg2
12009 mov r2, rSELF @ arg2
12032 mov r2, rSELF @ arg2
12055 mov r2, rSELF @ arg2
12078 mov r2, rSELF @ arg2
12101 mov r2, rSELF @ arg2
12124 mov r2, rSELF @ arg2
12147 mov r2, rSELF @ arg2
12170 mov r2, rSELF @ arg2
12193 mov r2, rSELF @ arg2
12216 mov r2, rSELF @ arg2
12239 mov r2, rSELF @ arg2
12262 mov r2, rSELF @ arg2
12285 mov r2, rSELF @ arg2
12308 mov r2, rSELF @ arg2
12331 mov r2, rSELF @ arg2
12354 mov r2, rSELF @ arg2
12377 mov r2, rSELF @ arg2
12400 mov r2, rSELF @ arg2
12423 mov r2, rSELF @ arg2
12446 mov r2, rSELF @ arg2
12469 mov r2, rSELF @ arg2
12492 mov r2, rSELF @ arg2
12515 mov r2, rSELF @ arg2
12538 mov r2, rSELF @ arg2
12561 mov r2, rSELF @ arg2
12584 mov r2, rSELF @ arg2
12607 mov r2, rSELF @ arg2
12630 mov r2, rSELF @ arg2
12653 mov r2, rSELF @ arg2
12676 mov r2, rSELF @ arg2
12699 mov r2, rSELF @ arg2
12722 mov r2, rSELF @ arg2
12745 mov r2, rSELF @ arg2
12768 mov r2, rSELF @ arg2
12791 mov r2, rSELF @ arg2
12814 mov r2, rSELF @ arg2
12837 mov r2, rSELF @ arg2
12860 mov r2, rSELF @ arg2
12883 mov r2, rSELF @ arg2
12906 mov r2, rSELF @ arg2
12929 mov r2, rSELF @ arg2
12952 mov r2, rSELF @ arg2
12975 mov r2, rSELF @ arg2
12998 mov r2, rSELF @ arg2
13021 mov r2, rSELF @ arg2
13044 mov r2, rSELF @ arg2
13067 mov r2, rSELF @ arg2
13090 mov r2, rSELF @ arg2
13113 mov r2, rSELF @ arg2
13136 mov r2, rSELF @ arg2
13159 mov r2, rSELF @ arg2
13182 mov r2, rSELF @ arg2
13205 mov r2, rSELF @ arg2
13228 mov r2, rSELF @ arg2
13251 mov r2, rSELF @ arg2
13274 mov r2, rSELF @ arg2
13297 mov r2, rSELF @ arg2
13320 mov r2, rSELF @ arg2
13343 mov r2, rSELF @ arg2
13366 mov r2, rSELF @ arg2
13389 mov r2, rSELF @ arg2
13412 mov r2, rSELF @ arg2
13435 mov r2, rSELF @ arg2
13458 mov r2, rSELF @ arg2
13481 mov r2, rSELF @ arg2
13504 mov r2, rSELF @ arg2
13527 mov r2, rSELF @ arg2
13550 mov r2, rSELF @ arg2
13573 mov r2, rSELF @ arg2
13596 mov r2, rSELF @ arg2
13619 mov r2, rSELF @ arg2
13642 mov r2, rSELF @ arg2
13665 mov r2, rSELF @ arg2
13688 mov r2, rSELF @ arg2
13711 mov r2, rSELF @ arg2
13734 mov r2, rSELF @ arg2
13757 mov r2, rSELF @ arg2
13780 mov r2, rSELF @ arg2
13803 mov r2, rSELF @ arg2
13826 mov r2, rSELF @ arg2
13849 mov r2, rSELF @ arg2
13872 mov r2, rSELF @ arg2
13895 mov r2, rSELF @ arg2
13918 mov r2, rSELF @ arg2
13941 mov r2, rSELF @ arg2
13964 mov r2, rSELF @ arg2
13987 mov r2, rSELF @ arg2
14010 mov r2, rSELF @ arg2
14033 mov r2, rSELF @ arg2
14056 mov r2, rSELF @ arg2
14079 mov r2, rSELF @ arg2
14102 mov r2, rSELF @ arg2
14125 mov r2, rSELF @ arg2
14148 mov r2, rSELF @ arg2
14171 mov r2, rSELF @ arg2
14194 mov r2, rSELF @ arg2
14217 mov r2, rSELF @ arg2
14240 mov r2, rSELF @ arg2
14263 mov r2, rSELF @ arg2
14286 mov r2, rSELF @ arg2
14309 mov r2, rSELF @ arg2
14332 mov r2, rSELF @ arg2
14355 mov r2, rSELF @ arg2
14378 mov r2, rSELF @ arg2
14401 mov r2, rSELF @ arg2
14424 mov r2, rSELF @ arg2
14447 mov r2, rSELF @ arg2
14470 mov r2, rSELF @ arg2
14493 mov r2, rSELF @ arg2
14516 mov r2, rSELF @ arg2
14539 mov r2, rSELF @ arg2
14562 mov r2, rSELF @ arg2
14585 mov r2, rSELF @ arg2
14608 mov r2, rSELF @ arg2
14631 mov r2, rSELF @ arg2
14654 mov r2, rSELF @ arg2
14677 mov r2, rSELF @ arg2
14700 mov r2, rSELF @ arg2
14723 mov r2, rSELF @ arg2
14746 mov r2, rSELF @ arg2
14769 mov r2, rSELF @ arg2
14792 mov r2, rSELF @ arg2
14815 mov r2, rSELF @ arg2
14838 mov r2, rSELF @ arg2
14861 mov r2, rSELF @ arg2
14884 mov r2, rSELF @ arg2
14907 mov r2, rSELF @ arg2
14930 mov r2, rSELF @ arg2
14953 mov r2, rSELF @ arg2
14976 mov r2, rSELF @ arg2
14999 mov r2, rSELF @ arg2
15022 mov r2, rSELF @ arg2
15045 mov r2, rSELF @ arg2
15068 mov r2, rSELF @ arg2
15091 mov r2, rSELF @ arg2
15114 mov r2, rSELF @ arg2
15137 mov r2, rSELF @ arg2
15160 mov r2, rSELF @ arg2
15183 mov r2, rSELF @ arg2
15206 mov r2, rSELF @ arg2
15229 mov r2, rSELF @ arg2
15252 mov r2, rSELF @ arg2
15275 mov r2, rSELF @ arg2
15298 mov r2, rSELF @ arg2
15321 mov r2, rSELF @ arg2
15344 mov r2, rSELF @ arg2
15367 mov r2, rSELF @ arg2
15390 mov r2, rSELF @ arg2
15413 mov r2, rSELF @ arg2
15436 mov r2, rSELF @ arg2
15459 mov r2, rSELF @ arg2
15482 mov r2, rSELF @ arg2
15505 mov r2, rSELF @ arg2
15528 mov r2, rSELF @ arg2
15551 mov r2, rSELF @ arg2
15574 mov r2, rSELF @ arg2
15602 mov rFP, r2 @ restore Dalvik fp
15604 mov r2, #0
15605 str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
15612 mov r2,#kSVSPunt @ r2<- interpreter entry point
15624 mov r2,#kSVSSingleStep @ r2<- interpreter entry point
15631 mov r2,#kSVSNoProfile @ r2<- interpreter entry point
15639 mov r2,#kSVSTraceSelect @ r2<- interpreter entry point
15647 mov r2,#kSVSTraceSelect @ r2<- interpreter entry point
15655 mov r2,#kSVSBackwardBranch @ r2<- interpreter entry point
15663 mov r2,#kSVSNormal @ r2<- interpreter entry point
15671 mov r2,#kSVSNoChain @ r2<- interpreter entry point
15684 mov rFP, r2 @ restore Dalvik fp
15686 mov r2, #0
15687 str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
15790 movne r2,#kJitTSelectRequestHot @ ask for trace selection
15926 mov r2,#kJitTSelectRequest @ ask for trace selection
15929 moveq r2,#kJitTSelectRequest @ ask for trace selection
15950 * r2 is jit state.
15956 str r2,[rSELF,#offThread_jitState]
15986 mov r2,rSELF @ r2<- self (Thread) pointer
15997 * r2: self verification state
16011 mov r2,#kJitSelfVerification @ ask for self verification
16012 str r2,[rSELF,#offThread_jitState]
16063 movs r2, rINST, lsr #8 @ r2<- AA (arg count) -- test for zero
16069 @ r0=methodToCall, r1=CCCC, r2=count, r10=outs
16072 sub r10, r10, r2, lsl #2 @ r10<- "outs" area, for call args
16074 subs r2, r2, #1 @ count--
16093 movs r2, rINST, lsr #12 @ r2<- B (arg count) -- test for zero
16098 @ r0=methodToCall, r1=GFED, r2=count, r10=outs
16100 rsb r2, r2, #5 @ r2<- 5-r2
16101 add pc, pc, r2, lsl #4 @ computed goto, 4 instrs each
16104 ldr r2, [rFP, ip, lsr #6] @ r2<- vA (shift right 8, left 2)
16106 str r2, [r10, #-4]! @ *--outs = vA
16108 ldr r2, [rFP, ip, lsr #10] @ r2<- vG (shift right 12, left 2)
16110 str r2, [r10, #-4]! @ *--outs = vG
16112 ldr r2, [rFP, ip, lsr #6] @ r2<- vF
16114 str r2, [r10, #-4]! @ *--outs = vF
16116 ldr r2, [rFP, ip, lsr #2] @ r2<- vE
16118 str r2, [r10, #-4]! @ *--outs = vE
16120 ldr r2, [rFP, ip, lsl #2] @ r2<- vD
16122 str r2, [r10, #-4]! @ *--outs = vD
16128 ldr r2, [r0, #offMethod_insns] @ r2<- method->insns
16177 ldrh r9, [r2] @ r9 <- load INST from new PC
16179 mov rPC, r2 @ publish new rPC
16185 mov r2, #1
16186 str r2, [rSELF, #offThread_debugIsMethodEntry]
16221 mov r2, r0 @ r2<- methodToCall
16239 ldr ip, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
16257 @ r0=newFp, r1=&retval, r2=methodToCall, r3=self, lr=subModes
16259 mov r0, r2 @ r0<- methodToCall
16261 mov r2, rFP
16266 ldr ip, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
16270 ldmfd sp!, {r0-r3} @ r2<- methodToCall (others unneeded)
16273 mov r0, r2 @ r0<- methodToCall
16275 mov r2, rFP
16305 mov r2, r0 @ A2<- methodToCall
16332 ldr r2, [rFP, #(offStackSaveArea_method - sizeofStackSaveArea)]
16333 @ r2<- method we're returning to
16334 cmp r2, #0 @ is this a break frame?
16338 ldr r10, [r2, #offMethod_clazz] @ r10<- method->clazz
16341 ldrne r10, [r2, #offMethod_clazz] @ r10<- method->clazz
16347 str r2, [rSELF, #offThread_method]@ self->method = newSave->method
16369 ldr r1, [r0, #offStackSaveArea_prevFrame] @ r2<- prevFP
16412 ldrh r2, [rSELF, #offThread_subMode] @ get subMode flags
16417 cmp r2, #0 @ any special subMode handling needed?
16429 mov r2, r9 @ r2<- exception
16457 ldr r2, [r1, #offMethod_clazz] @ r2<- method->clazz
16459 ldr r2, [r2, #offClassObject_pDvmDex] @ r2<- method->clazz->pDvmDex
16461 str r2, [rSELF, #offThread_methodClassDex] @ self->pDvmDex = meth...
16512 ldr r2, strExceptionNotCaughtLocally
16513 0: add r2, pc
16558 stmfd sp!, {r0-r2,lr} @ save regs
16562 ldmfd sp!, {r0-r2, lr}
16650 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16655 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16673 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16678 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16688 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16692 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16702 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16707 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16717 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16719 mov r2, r0
16723 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16733 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16735 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16744 stmfd sp!, {r0, r1, r2, r3, ip, lr}
16746 ldmfd sp!, {r0, r1, r2, r3, ip, lr}
16760 fmrx r2, fpscr @ get VFP reg
16762 and r2, r2, r1 @ clear masked bits
16763 orr r2, r2, r0 @ set specified bits
16764 fmxr fpscr, r2 @ set VFP reg
16765 mov r0, r2 @ return new value
