Lines Matching refs:lui
210 // specially coded on MIPS means that it is a lui/ori instruction, and that is
558 return opcode == LUI;
1350 lui(at, (src.offset_ >> kLuiShift) & kImm16Mask);
1456 void Assembler::lui(Register rd, int32_t j) {
1458 GenInstrImmediate(LUI, zero_reg, rd, j);
2122 lui(at, (imm32 & kHiMask) >> kLuiShift);
2149 // Interpret 2 instructions generated by li: lui/ori
2150 if ((GetOpcodeField(instr1) == LUI) && (GetOpcodeField(instr2) == ORI)) {
2171 // On Mips, a target address is stored in a lui/ori instruction pair, each
2187 CHECK((GetOpcodeField(instr1) == LUI && GetOpcodeField(instr2) == ORI));
2190 // Must use 2 instructions to insure patchable code => just use lui and ori.
2191 // lui rt, upper-16.
2193 *p = LUI | rt_code | ((itarget & kHiMask) >> kLuiShift);
2277 // Address pc points to lui/ori instructions.
2288 ASSERT(GetOpcodeField(instr1) == LUI);
2296 ASSERT(GetOpcodeField(instr1) == LUI);
