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Lines Matching refs:VReg

900       unsigned VReg = MF.addLiveIn(AArch64ArgRegs[i], &AArch64::GPR64RegClass);
901       SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::i64);
919       unsigned VReg = MF.addLiveIn(AArch64FPRArgRegs[i],
921       SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f128);