Lines Matching refs:A64SE
258 A64SE::ShiftExtSpecifiers Shift) {
262 if (Shift == A64SE::LSL && MO.isImm() && MO.getImm() == 0)
266 case A64SE::LSL: O << "lsl"; break;
267 case A64SE::LSR: O << "lsr"; break;
268 case A64SE::ASR: O << "asr"; break;
269 case A64SE::ROR: O << "ror"; break;
325 A64SE::ShiftExtSpecifiers Ext) {
332 A64SE::ShiftExtSpecifiers LSLEquiv;
335 LSLEquiv = A64SE::UXTX;
337 LSLEquiv = A64SE::UXTW;
346 case A64SE::UXTB: O << "uxtb"; break;
347 case A64SE::UXTH: O << "uxth"; break;
348 case A64SE::UXTW: O << "uxtw"; break;
349 case A64SE::UXTX: O << "uxtx"; break;
350 case A64SE::SXTB: O << "sxtb"; break;
351 case A64SE::SXTH: O << "sxth"; break;
352 case A64SE::SXTW: O << "sxtw"; break;
353 case A64SE::SXTX: O << "sxtx"; break;
410 template <A64SE::ShiftExtSpecifiers Ext, bool isHalf>
420 if (Ext == A64SE::LSL)
422 else if (Ext != A64SE::MSL)
