Cross Reference: /external/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp

Lines Matching refs:MBBI
57                   MachineBasicBlock::iterator MBBI);
59     void ExpandVLD(MachineBasicBlock::iterator &MBBI);
60     void ExpandVST(MachineBasicBlock::iterator &MBBI);
61     void ExpandLaneOp(MachineBasicBlock::iterator &MBBI);
62     void ExpandVTBL(MachineBasicBlock::iterator &MBBI,
65                            MachineBasicBlock::iterator &MBBI);
374 void ARMExpandPseudo::ExpandVLD(MachineBasicBlock::iterator &MBBI) {
375   MachineInstr &MI = *MBBI;
383   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
439 void ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) {
440   MachineInstr &MI = *MBBI;
448   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
490 void ARMExpandPseudo::ExpandLaneOp(MachineBasicBlock::iterator &MBBI) {
491   MachineInstr &MI = *MBBI;
500   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
579 void ARMExpandPseudo::ExpandVTBL(MachineBasicBlock::iterator &MBBI,
581   MachineInstr &MI = *MBBI;
584   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
612                                         MachineBasicBlock::iterator &MBBI) {
613   MachineInstr &MI = *MBBI;
626     LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg);
627     HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::ORRri))
656   LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LO16Opc), DstReg);
657   HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc))
684                                MachineBasicBlock::iterator MBBI) {
685   MachineInstr &MI = *MBBI;
693       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(newOpc),
706       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc),
718       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi),
732       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsr),
747       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi16),
759       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc),
770       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MVNi),
795           emitT2RegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6,
798           emitThumbRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6,
801           emitARMRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6,
813           AddDefaultCC(AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(),
827       AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi),
840         AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(),TII->get(ARM::MOVsi),
852         BuildMI(MBB, MBBI, MI.getDebugLoc(),
868         AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(),
872       MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
905       MachineInstrBuilder MIB1 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
909       MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
920       MachineInstrBuilder MIB3 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
938       ExpandMOV32BitImm(MBB, MBBI);
944         BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc));
975         BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc));
1007         BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc));
1083       ExpandVLD(MBBI);
1131       ExpandVST(MBBI);
1206       ExpandLaneOp(MBBI);
1209     case ARM::VTBL3Pseudo: ExpandVTBL(MBBI, ARM::VTBL3, false); return true;
1210     case ARM::VTBL4Pseudo: ExpandVTBL(MBBI, ARM::VTBL4, false); return true;
1211     case ARM::VTBX3Pseudo: ExpandVTBL(MBBI, ARM::VTBX3, true); return true;
1212     case ARM::VTBX4Pseudo: ExpandVTBL(MBBI, ARM::VTBX4, true); return true;
1219   MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
1220   while (MBBI != E) {
1221     MachineBasicBlock::iterator NMBBI = llvm::next(MBBI);
1222     Modified |= ExpandMI(MBB, MBBI);
1223     MBBI = NMBBI;
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