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Lines Matching refs:NumAlignedDPRCS2Regs

37                         unsigned NumAlignedDPRCS2Regs);
584                                     unsigned NumAlignedDPRCS2Regs,
601       if (Reg >= ARM::D8 && Reg < ARM::D8 + NumAlignedDPRCS2Regs)
653                                    unsigned NumAlignedDPRCS2Regs) const {
672       if (Reg >= ARM::D8 && Reg < ARM::D8 + NumAlignedDPRCS2Regs)
727 /// Emit aligned spill instructions for NumAlignedDPRCS2Regs D-registers
732                                     unsigned NumAlignedDPRCS2Regs,
779                               .addImm(8 * NumAlignedDPRCS2Regs)));
799   // Now spill NumAlignedDPRCS2Regs registers starting from d8.
805   if (NumAlignedDPRCS2Regs >= 6) {
815     NumAlignedDPRCS2Regs -= 4;
823   if (NumAlignedDPRCS2Regs >= 4) {
831     NumAlignedDPRCS2Regs -= 4;
835   if (NumAlignedDPRCS2Regs >= 2) {
842     NumAlignedDPRCS2Regs -= 2;
846   if (NumAlignedDPRCS2Regs) {
862                         unsigned NumAlignedDPRCS2Regs) {
870   switch(NumAlignedDPRCS2Regs) {
886 /// Emit aligned reload instructions for NumAlignedDPRCS2Regs D-registers
891                                       unsigned NumAlignedDPRCS2Regs,
919   // Now restore NumAlignedDPRCS2Regs registers starting from d8.
923   if (NumAlignedDPRCS2Regs >= 6) {
931     NumAlignedDPRCS2Regs -= 4;
939   if (NumAlignedDPRCS2Regs >= 4) {
946     NumAlignedDPRCS2Regs -= 4;
950   if (NumAlignedDPRCS2Regs >= 2) {
956     NumAlignedDPRCS2Regs -= 2;
960   if (NumAlignedDPRCS2Regs)
982   unsigned NumAlignedDPRCS2Regs = AFI->getNumAlignedDPRCS2Regs();
988                NumAlignedDPRCS2Regs, MachineInstr::FrameSetup);
993   if (NumAlignedDPRCS2Regs)
994     emitAlignedDPRCS2Spills(MBB, MI, NumAlignedDPRCS2Regs, CSI, TRI);
1009   unsigned NumAlignedDPRCS2Regs = AFI->getNumAlignedDPRCS2Regs();
1013   if (NumAlignedDPRCS2Regs)
1014     emitAlignedDPRCS2Restores(MBB, MI, NumAlignedDPRCS2Regs, CSI, TRI);
1020               NumAlignedDPRCS2Regs);