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Lines Matching full:isvector

137   bool parseDirectiveRegSave(SMLoc L, bool IsVector);
8005 bool ARMAsmParser::parseDirectiveRegSave(SMLoc L, bool IsVector) {
8025   if (!IsVector && !Op->isRegList())
8027   if (IsVector && !Op->isDPRRegList())
8030   getParser().getStreamer().EmitRegSave(Op->getRegList(), IsVector);