Lines Matching full:mbb
117 for (MachineBasicBlock *MBB = From; MBB != To && !MBB->succ_empty();
118 MBB = *MBB->succ_begin()) {
120 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
145 MachineBasicBlock &MBB = *MI.getParent();
148 if (!shouldSkip(&MBB, &MBB.getParent()->back()))
155 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ))
160 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::EXP))
172 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_ENDPGM));
176 MachineBasicBlock &MBB = *MI.getParent();
181 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_SAVEEXEC_B64), Reg)
184 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), Reg)
194 MachineBasicBlock &MBB = *MI.getParent();
199 BuildMI(MBB, MBB.getFirstNonPHI(), DL,
203 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), AMDGPU::EXEC)
213 MachineBasicBlock &MBB = *MI.getParent();
219 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst)
227 MachineBasicBlock &MBB = *MI.getParent();
234 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst)
242 MachineBasicBlock &MBB = *MI.getParent();
249 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst)
257 MachineBasicBlock &MBB = *MI.getParent();
261 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_ANDN2_B64), AMDGPU::EXEC)
265 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ))
273 MachineBasicBlock &MBB = *MI.getParent();
277 BuildMI(MBB, MBB.getFirstNonPHI(), DL,
296 MachineBasicBlock &MBB = *MI.getParent();
300 assert(MBB.getParent()->getInfo<SIMachineFunctionInfo>()->ShaderType ==
304 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_CMPX_LE_F32_e32), AMDGPU::VCC)
313 MachineBasicBlock &MBB = *MI.getParent();
321 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0)
323 MBB.insert(I, MovRel);
332 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B64), Save)
336 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32_e32), AMDGPU::VCC)
340 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0)
344 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_CMP_EQ_U32_e32), AMDGPU::VCC)
349 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_SAVEEXEC_B64), AMDGPU::VCC)
353 MBB.insert(I, MovRel);
356 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), AMDGPU::EXEC)
361 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ))
366 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B64), AMDGPU::EXEC)
374 MachineBasicBlock &MBB = *MI.getParent();
382 BuildMI(*MBB.getParent(), DL, TII->get(AMDGPU::V_MOVRELS_B32_e32), Dst)
392 MachineBasicBlock &MBB = *MI.getParent();
400 BuildMI(*MBB.getParent(), DL, TII->get(AMDGPU::V_MOVRELD_B32_e32))
421 MachineBasicBlock &MBB = *BI;
422 for (MachineBasicBlock::iterator I = MBB.begin(), Next = llvm::next(I);
423 I != MBB.end(); I = Next) {
504 MachineBasicBlock &MBB = MF.front();
507 BuildMI(MBB, MBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_MOV_B32),
512 MachineBasicBlock &MBB = MF.front();
513 BuildMI(MBB, MBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_WQM_B64),
