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Lines Matching refs:EltVT

4813   EVT EltVT = SrcVT.getVectorElementType();
4814 if (EltVT == MVT::i8 || EltVT == MVT::i16)
5309 EVT EltVT = VT.getVectorElementType();
5335 if (!DAG.isConsecutiveLoad(LD, LDBase, EltVT.getSizeInBits()/8, i))
6077 MVT EltVT = VT.getVectorElementType();
6080 if (!Subtarget->hasSSE41() || EltVT == MVT::i8)
6113 if (EltVT == MVT::i64 || (EltVT == MVT::i32 && !Subtarget->hasInt256())) {
6114 BlendVT = MVT::getVectorVT(MVT::getFloatingPointVT(EltVT.getSizeInBits()),
6650 MVT EltVT = VT.getVectorElementType();
6651 MVT NVT = MVT::getVectorVT(EltVT, NumLaneElems);
6708 SVOps.push_back(DAG.getUNDEF(EltVT));
6719 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
7255 MVT EltVT = VT.getVectorElementType();
7256 ShAmt *= EltVT.getSizeInBits();
7294 MVT EltVT = VT.getVectorElementType();
7295 ShAmt *= EltVT.getSizeInBits();
7549 EVT EltVT = VecVT.getVectorElementType();
7551 unsigned ElemsPerChunk = 128 / EltVT.getSizeInBits();
7580 MVT EltVT = MVT::i32;
7581 SDValue Extract = DAG.getNode(X86ISD::PEXTRW, dl, EltVT,
7583 SDValue Assert = DAG.getNode(ISD::AssertZext, dl, EltVT, Extract,
7626 MVT EltVT = VT.getVectorElementType();
7636 if ((EltVT.getSizeInBits() == 8 || EltVT.getSizeInBits() == 16) &&
7655 if (EltVT == MVT::f32 && isa<ConstantSDNode>(N2)) {
7670 if ((EltVT == MVT::i32 || EltVT == MVT::i64) && isa<ConstantSDNode>(N2)) {
7680 MVT EltVT = VT.getVectorElementType();
7698 unsigned NumEltsIn128 = 128/EltVT.getSizeInBits();
7711 if (EltVT == MVT::i8)
7714 if (EltVT.getSizeInBits() == 16 && isa<ConstantSDNode>(N2)) {
9014 MVT EltVT = VT;
9017 EltVT = VT.getVectorElementType();
9021 if (EltVT == MVT::f64)
9048 MVT EltVT = VT;
9051 EltVT = VT.getVectorElementType();
9055 if (EltVT == MVT::f64)
9661 MVT EltVT = VT.getVectorElementType();
9662 MVT NewVT = MVT::getVectorVT(EltVT, NumElems/2);
9681 MVT EltVT = Op0.getValueType().getVectorElementType().getSimpleVT();
9682 assert(EltVT == MVT::f32 || EltVT == MVT::f64);
9824 EVT EltVT = VT.getVectorElementType();
9825 SDValue SB = DAG.getConstant(APInt::getSignBit(EltVT.getSizeInBits()), VT);
10739 MVT EltVT = VT.getVectorElementType().getSimpleVT();
10740 EVT ShVT = MVT::getVectorVT(EltVT, 128/EltVT.getSizeInBits());
11858 MVT EltVT = VT.getVectorElementType().getSimpleVT();
11859 EVT NewVT = MVT::getVectorVT(EltVT, NumElems/2);
12177 EVT EltVT = VT.getVectorElementType();
12220 BaseShAmt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Amt,
12226 if (EltVT.bitsGT(MVT::i32))
12228 else if (EltVT.bitsLT(MVT::i32))
12390 MVT EltVT = VT.getVectorElementType().getSimpleVT();
12391 EVT NewVT = MVT::getVectorVT(EltVT, NumElems/2);
12532 MVT EltVT = VT.getVectorElementType().getSimpleVT();
12533 EVT NewVT = MVT::getVectorVT(EltVT, NumElems/2);