Lines Matching full:undef
8 br i1 undef, label %bb1, label %bb2
17 %tmp = icmp slt i32 undef, undef
21 %tmp5 = load <4 x i32>* undef, align 16
26 %tmp10 = fmul <4 x float> undef, %tmp9
27 %tmp11 = fadd <4 x float> undef, %tmp10
31 %tmp15 = insertvalue [2 x i64] undef, i64 %tmp14, 1
38 %tmp22 = call <4 x float> @llvm.arm.neon.vmins.v4f32(<4 x float> %tmp21, <4 x float> undef) nounwind
39 call arm_aapcs_vfpcc void @bar(i8* null, i8* undef, <4 x i32>* undef, [2 x i64] zeroinitializer) nounwind
42 %tmp25 = insertvalue [2 x i64] undef, i64 %tmp24, 0
44 %tmp27 = load float* undef, align 4
45 %tmp28 = insertelement <4 x float> undef, float %tmp27, i32 3
46 %tmp29 = load <4 x i32>* undef, align 16
51 %tmp34 = call <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float> undef, <4 x float> %tmp28) nounwind
52 %tmp35 = fmul <4 x float> %tmp34, undef
53 %tmp36 = fmul <4 x float> %tmp35, undef
54 %tmp37 = call arm_aapcs_vfpcc i8* undef(i8* undef) nounwind
55 %tmp38 = load float* undef, align 4
56 %tmp39 = insertelement <2 x float> undef, float %tmp38, i32 0
57 %tmp40 = call arm_aapcs_vfpcc i8* undef(i8* undef) nounwind
58 %tmp41 = load float* undef, align 4
59 %tmp42 = insertelement <4 x float> undef, float %tmp41, i32 3
60 %tmp43 = shufflevector <2 x float> %tmp39, <2 x float> undef, <4 x i32> zeroinitializer
63 %tmp46 = fsub <4 x float> %tmp45, undef
65 %tmp48 = fadd <4 x float> undef, %tmp47
66 %tmp49 = call arm_aapcs_vfpcc i8* undef(i8* undef) nounwind
67 %tmp50 = load float* undef, align 4
68 %tmp51 = insertelement <4 x float> undef, float %tmp50, i32 3
69 %tmp52 = call arm_aapcs_vfpcc float* null(i8* undef) nounwind
71 %tmp55 = insertelement <4 x float> undef, float %tmp54, i32 3
74 %tmp58 = fmul <4 x float> undef, %tmp57
79 call arm_aapcs_vfpcc void @baz(i8* undef, i8* undef, [2 x i64] %tmp26, <4 x i32>* undef)
84 call arm_aapcs_vfpcc void @quux(i8* undef, i8* undef, [2 x i64] undef, i8* undef, [2 x i64] %tmp66, i8* undef, i8* undef, [2 x i64] %tmp26, [2 x i64] %tmp15, <4 x i32>* undef)
