Lines Matching full:undef
25 call void @llvm.arm.neon.vst4.v4i32(i8* undef, <4 x i32> <i32 0, i32 1065353216, i32 1073741824, i32 1077936128>, <4 x i32> <i32 1082130432, i32 1084227584, i32 1086324736, i32 1088421888>, <4 x i32> <i32 1090519040, i32 1091567616, i32 1092616192, i32 1093664768>, <4 x i32> <i32 1094713344, i32 1095761920, i32 1096810496, i32 1097859072>, i32 16) nounwind
28 store float 0.000000e+00, float* undef, align 4
29 %4 = call arm_aapcs_vfpcc %2* @func3(%2* undef, %2* undef, i32 2956) nounwind
30 call arm_aapcs_vfpcc void @func1(%0* %3, float* undef, float* undef, %2* undef)
32 store float 1.000000e+00, float* undef, align 4
33 call arm_aapcs_vfpcc void @func1(%0* undef, float* undef, float* undef, %2* undef)
34 store float 1.500000e+01, float* undef, align 4
36 %7 = call arm_aapcs_vfpcc %2* @func3(%2* undef, %2* undef, i32 2971) nounwind
37 %8 = fadd float undef, -1.000000e+05
38 store float %8, float* undef, align 16, !tbaa !3
40 %10 = fmul float undef, 2.000000e+05
42 store float %11, float* undef, align 4, !tbaa !3
43 call void @llvm.arm.neon.vst4.v4i32(i8* undef, <4 x i32> <i32 0, i32 1065353216, i32 1073741824, i32 1077936128>, <4 x i32> <i32 1082130432, i32 1084227584, i32 1086324736, i32 1088421888>, <4 x i32> <i32 1090519040, i32 1091567616, i32 1092616192, i32 1093664768>, <4 x i32> <i32 1094713344, i32 1095761920, i32 1096810496, i32 1097859072>, i32 16) nounwind
