Lines Matching refs:alu
36 static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
38 if(alu->is_op3)
44 switch (alu->inst) {
121 "Need instruction operand number for 0x%x.\n", alu->inst);
126 switch (alu->inst) {
204 "Need instruction operand number for 0x%x.\n", alu->inst);
212 int r700_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id);
221 LIST_INITHEAD(&cf->alu);
229 struct r600_bytecode_alu *alu = CALLOC_STRUCT(r600_bytecode_alu);
231 if (alu == NULL)
233 LIST_INITHEAD(&alu->list);
234 return alu;
282 /* take into account extended alu size */
341 /* alu instructions that can ony exits once per group */
342 static int is_alu_once_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
347 return !alu->is_op3 && (
348 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE ||
349 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT ||
350 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE ||
351 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE ||
352 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT ||
353 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT ||
354 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT ||
355 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT ||
356 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT ||
357 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT ||
358 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT ||
359 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT ||
360 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE ||
361 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT ||
362 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE ||
363 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE ||
364 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV ||
365 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP ||
366 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR ||
367 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_RESTORE ||
368 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH ||
369 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH ||
370 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH ||
371 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH ||
372 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT ||
373 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT ||
374 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT ||
375 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT ||
376 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT ||
377 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT ||
378 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT ||
379 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT ||
380 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT ||
381 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT);
385 return !alu->is_op3 && (
386 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE ||
387 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT ||
388 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE ||
389 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE ||
390 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT ||
391 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT ||
392 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT ||
393 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT ||
394 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT ||
395 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT ||
396 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT ||
397 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT ||
398 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE ||
399 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT ||
400 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE ||
401 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE ||
402 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV ||
403 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP ||
404 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR ||
405 alu
406 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH ||
407 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH ||
408 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH ||
409 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH ||
410 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT ||
411 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT ||
412 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT ||
413 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT ||
414 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT ||
415 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT ||
416 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT ||
417 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT ||
418 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT ||
419 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT);
423 static int is_alu_reduction_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
428 return !alu->is_op3 && (
429 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE ||
430 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 ||
431 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE ||
432 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4);
436 return !alu->is_op3 && (
437 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE ||
438 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 ||
439 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE ||
440 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4);
444 static int is_alu_cube_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
449 return !alu->is_op3 &&
450 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE;
454 return !alu->is_op3 &&
455 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE;
459 static int is_alu_mova_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
464 return !alu->is_op3 && (
465 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA ||
466 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR ||
467 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT ||
468 alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT);
472 return !alu->is_op3 && (
473 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT);
482 /* ALU instructions that can only execute on the vector unit:
493 static int is_alu_vec_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
498 if (alu->is_op3)
499 return is_opcode_in_range(alu->inst,
503 return (alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FREXP_64) ||
504 is_opcode_in_range(alu->inst,
507 is_opcode_in_range(alu->inst,
510 is_opcode_in_range(alu->inst,
513 is_opcode_in_range(alu->inst,
518 if (alu->is_op3)
519 return is_opcode_in_range(alu->inst,
523 return is_opcode_in_range(alu->inst,
533 /* ALU instructions that can only execute on the trans unit:
548 static int is_alu_trans_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
553 if (alu->is_op3)
554 return alu->inst == V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT;
556 return is_opcode_in_range(alu->inst,
560 if (alu->is_op3)
561 return alu->inst == V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT;
563 return is_opcode_in_range(alu->inst,
566 is_opcode_in_range(alu->inst,
570 if (alu->is_op3)
571 return alu->inst == EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT;
573 return is_opcode_in_range(alu->inst,
583 /* alu instructions that can execute on any unit */
584 static int is_alu_any_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
586 return !is_alu_vec_unit_inst(bc, alu) &&
587 !is_alu_trans_unit_inst(bc, alu);
590 static int is_nop_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
595 return (!alu->is_op3 && alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP);
599 return (!alu->is_op3 && alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP);
606 struct r600_bytecode_alu *alu;
613 for (alu = alu_first; alu; alu = LIST_ENTRY(struct r600_bytecode_alu, alu->list.next, list)) {
614 chan = alu->dst.chan;
617 else if (is_alu_trans_unit_inst(bc, alu))
619 else if (is_alu_vec_unit_inst(bc, alu))
628 assert(0); /* ALU.Trans has already been allocated. */
631 assignment[4] = alu;
634 assert(0); /* ALU.chan has already been allocated. */
637 assignment[chan] = alu;
640 if (alu->last)
717 /* CB constants start at 512, and get translated to a kcache index when ALU
734 static int check_vector(struct r600_bytecode *bc, struct r600_bytecode_alu *alu,
739 num_src = r600_bytecode_get_num_operands(bc, alu);
741 sel = alu->src[src].sel;
742 elem = alu->src[src].chan;
745 if (src == 1 && sel == alu->src[0].sel && elem == alu->src[0].chan)
755 r = reserve_cfile(bc, bs, (alu->src[src].kc_bank<<16) + sel, elem);
764 static int check_scalar(struct r600_bytecode *bc, struct r600_bytecode_alu *alu,
769 num_src = r600_bytecode_get_num_operands(bc, alu);
771 sel = alu->src[src].sel;
772 elem = alu->src[src].chan;
782 r = reserve_cfile(bc, bs, (alu->src[src].kc_bank<<16) + sel, elem);
788 sel = alu->src[src].sel;
789 elem = alu->src[src].chan;
918 struct r600_bytecode_alu *alu = slots[i];
919 if(!alu)
922 num_src = r600_bytecode_get_num_operands(bc, alu);
924 if (!is_gpr(alu->src[src].sel) || alu->src[src].rel)
928 if (alu->src[src].sel == gpr[4] &&
929 alu->src[src].chan == chan[4] &&
930 alu_prev->pred_sel == alu->pred_sel) {
931 alu->src[src].sel = V_SQ_ALU_SRC_PS;
932 alu->src[src].chan = 0;
938 if (alu->src[src].sel == gpr[j] &&
939 alu->src[src].chan == j &&
940 alu_prev->pred_sel == alu->pred_sel) {
941 alu->src[src].sel = V_SQ_ALU_SRC_PV;
942 alu->src[src].chan = chan[j];
985 static int r600_bytecode_alu_nliterals(struct r600_bytecode *bc, struct r600_bytecode_alu *alu,
988 unsigned num_src = r600_bytecode_get_num_operands(bc, alu);
992 if (alu->src[i].sel == V_SQ_ALU_SRC_LITERAL) {
993 uint32_t value = alu->src[i].value;
1012 struct r600_bytecode_alu *alu,
1015 unsigned num_src = r600_bytecode_get_num_operands(bc, alu);
1019 if (alu->src[i].sel == V_SQ_ALU_SRC_LITERAL) {
1020 uint32_t value = alu->src[i].value;
1023 alu->src[i].chan = j;
1065 struct r600_bytecode_alu *alu;
1121 alu = slots[i];
1122 num_once_inst += is_alu_once_inst(bc, alu);
1125 if (is_nop_inst(bc, alu))
1129 if (alu->dst.rel) {
1136 num_src = r600_bytecode_get_num_operands(bc, alu);
1138 if (alu->src[src].rel) {
1145 if (!is_gpr(alu->src[src].sel))
1153 if (prev[j]->dst.chan == alu->src[src].chan &&
1154 (prev[j]->dst.sel == alu->src[src].sel ||
1155 prev[j]->dst.rel || alu->src[src].rel))
1181 LIST_ADDTAIL(&result[i]->list, &bc->cf_last->alu);
1186 LIST_ENTRY(struct r600_bytecode_alu, bc->cf_last->alu.prev, list)->last = 1;
1265 struct r600_bytecode_alu *alu)
1270 unsigned bank, line, sel = alu->src[i].sel;
1275 bank = alu->src[i].kc_bank;
1285 struct r600_bytecode_alu *alu,
1293 unsigned int line, sel = alu->src[i].sel, found = 0;
1308 if (kcache[j].bank == alu->src[i].kc_bank &&
1311 alu->src[i].sel = sel - (kcache[j].addr<<4);
1312 alu->src[i].sel += base[j];
1321 static int r600_bytecode_alloc_kcache_lines(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, int type)
1329 if ((r = r600_bytecode_alloc_inst_kcache_lines(bc, kcache, alu))) {
1338 if ((r = r600_bytecode_alloc_inst_kcache_lines(bc, kcache, alu))) {
1359 struct r600_bytecode_alu alu;
1363 memset(&alu, 0, sizeof(alu));
1364 alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP;
1365 alu.src[0].chan = i;
1366 alu.dst.chan = i;
1367 alu.last = (i == 3);
1368 r = r600_bytecode_add_alu(bc, &alu);
1378 struct r600_bytecode_alu alu;
1388 memset(&alu, 0, sizeof(alu));
1389 alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT;
1390 alu.src[0].sel = bc->ar_reg;
1391 alu.last = 1;
1392 alu.index_mode = INDEX_MODE_LOOP;
1393 r = r600_bytecode_add_alu(bc, &alu);
1405 struct r600_bytecode_alu alu;
1418 memset(&alu, 0, sizeof(alu));
1419 alu.inst = BC_INST(bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT);
1420 alu.src[0].sel = bc->ar_reg;
1421 alu.last = 1;
1422 r = r600_bytecode_add_alu(bc, &alu);
1431 int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu, int type)
1439 memcpy(nalu, alu, sizeof(struct r600_bytecode_alu));
1445 LIST_FOR_EACH_ENTRY(lalu, &bc->cf_last->alu, list) {
1455 /* cf can contains only alu or only vtx or only tex */
1473 /* Setup the kcache for this ALU instruction. This will start a new
1474 * ALU clause if needed. */
1483 /* number of gpr == the last gpr used in any alu */
1495 LIST_ADDTAIL(&nalu->list, &bc->cf_last->alu);
1496 /* each alu use 2 dwords */
1500 /* process cur ALU instructions for bank swizzle */
1535 /* at most 128 slots, one add alu can add 5 slots + 4 constants(2 slots)
1552 int r600_bytecode_add_alu(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu)
1554 return r600_bytecode_add_alu_type(bc, alu, BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU));
1600 /* cf can contains only alu or only vtx or only tex */
1662 /* cf can contains only alu or only vtx or only tex */
1765 static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id)
1768 bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
1769 S_SQ_ALU_WORD0_SRC0_REL(alu->src[0].rel) |
1770 S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
1771 S_SQ_ALU_WORD0_SRC0_NEG(alu->src[0].neg) |
1772 S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
1773 S_SQ_ALU_WORD0_SRC1_REL(alu->src[1].rel) |
1774 S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
1775 S_SQ_ALU_WORD0_SRC1_NEG(alu->src[1].neg) |
1776 S_SQ_ALU_WORD0_INDEX_MODE(alu->index_mode) |
1777 S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) |
1778 S_SQ_ALU_WORD0_LAST(alu->last);
1780 if (alu->is_op3) {
1781 bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
1782 S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
1783 S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |
1784 S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |
1785 S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu->src[2].sel) |
1786 S_SQ_ALU_WORD1_OP3_SRC2_REL(alu->src[2].rel) |
1787 S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) |
1788 S_SQ_ALU_WORD1_OP3_SRC2_NEG(alu->src[2].neg) |
1789 S_SQ_ALU_WORD1_OP3_ALU_INST(alu->inst) |
1790 S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle);
1792 bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
1793 S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
1794 S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |
1795 S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |
1796 S_SQ_ALU_WORD1_OP2_SRC0_ABS(alu->src[0].abs) |
1797 S_SQ_ALU_WORD1_OP2_SRC1_ABS(alu->src[1].abs) |
1798 S_SQ_ALU_WORD1_OP2_WRITE_MASK(alu->dst.write) |
1799 S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) |
1800 S_SQ_ALU_WORD1_OP2_ALU_INST(alu->inst) |
1801 S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle) |
1802 S_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(alu->execute_mask) |
1803 S_SQ_ALU_WORD1_OP2_UPDATE_PRED(alu->update_pred);
1904 struct r600_bytecode_alu *alu;
2025 LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
2026 r = r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
2029 r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral);
2030 r600_bytecode_assign_kcache_banks(bc, alu, cf->kcache);
2033 case EVERGREEN: /* eg alu is same encoding as r700 */
2035 r = r700_bytecode_alu_build(bc, alu, addr);
2044 if (alu->last) {
2124 LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
2125 r = r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
2128 r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral);
2129 r600_bytecode_assign_kcache_banks(bc, alu, cf->kcache);
2133 r = r600_bytecode_alu_build(bc, alu, addr);
2136 r = r700_bytecode_alu_build(bc, alu, addr);
2145 if (alu->last) {
2205 struct r600_bytecode_alu *alu = NULL, *next_alu;
2209 LIST_FOR_EACH_ENTRY_SAFE(alu, next_alu, &cf->alu, list) {
2210 free(alu);
2213 LIST_INITHEAD(&cf->alu);
2236 struct r600_bytecode_alu *alu = NULL;
2285 fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
2291 fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
2395 fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
2401 fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
2483 LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
2484 r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
2487 fprintf(stderr, "SRC0(SEL:%d ", alu
2488 fprintf(stderr, "REL:%d ", alu->src[0].rel);
2489 fprintf(stderr, "CHAN:%d ", alu->src[0].chan);
2490 fprintf(stderr, "NEG:%d) ", alu->src[0].neg);
2491 fprintf(stderr, "SRC1(SEL:%d ", alu->src[1].sel);
2492 fprintf(stderr, "REL:%d ", alu->src[1].rel);
2493 fprintf(stderr, "CHAN:%d ", alu->src[1].chan);
2494 fprintf(stderr, "NEG:%d ", alu->src[1].neg);
2495 fprintf(stderr, "IM:%d) ", alu->index_mode);
2496 fprintf(stderr, "PRED_SEL:%d ", alu->pred_sel);
2497 fprintf(stderr, "LAST:%d)\n", alu->last);
2499 fprintf(stderr, "%04d %08X %c ", id, bc->bytecode[id], alu->last ? '*' : ' ');
2500 fprintf(stderr, "INST:0x%x ", alu->inst);
2501 fprintf(stderr, "DST(SEL:%d ", alu->dst.sel);
2502 fprintf(stderr, "CHAN:%d ", alu->dst.chan);
2503 fprintf(stderr, "REL:%d ", alu->dst.rel);
2504 fprintf(stderr, "CLAMP:%d) ", alu->dst.clamp);
2505 fprintf(stderr, "BANK_SWIZZLE:%d ", alu->bank_swizzle);
2506 if (alu->is_op3) {
2507 fprintf(stderr, "SRC2(SEL:%d ", alu->src[2].sel);
2508 fprintf(stderr, "REL:%d ", alu->src[2].rel);
2509 fprintf(stderr, "CHAN:%d ", alu->src[2].chan);
2510 fprintf(stderr, "NEG:%d)\n", alu->src[2].neg);
2512 fprintf(stderr, "SRC0_ABS:%d ", alu->src[0].abs);
2513 fprintf(stderr, "SRC1_ABS:%d ", alu->src[1].abs);
2514 fprintf(stderr, "WRITE_MASK:%d ", alu->dst.write);
2515 fprintf(stderr, "OMOD:%d ", alu->omod);
2516 fprintf(stderr, "EXECUTE_MASK:%d ", alu->execute_mask);
2517 fprintf(stderr, "UPDATE_PRED:%d\n", alu->update_pred);
2521 if (alu->last) {
2770 struct r600_bytecode_alu alu;
2771 memset(&alu, 0, sizeof(alu));
2772 alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
2773 alu.src[0].sel = 0;
2774 alu.src[0].chan = 3;
2775 alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
2776 alu.src[1].value = (1ll << 32) / elements[i].instance_divisor + 1;
2777 alu.dst.sel = i + 1;
2778 alu.dst.chan = j;
2779 alu.dst.write = j == 3;
2780 alu.last = j == 3;
2781 if ((r = r600_bytecode_add_alu(&bc, &alu))) {
2787 struct r600_bytecode_alu alu;
2788 memset(&alu, 0, sizeof(alu));
2789 alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
2790 alu.src[0].sel = 0;
2791 alu.src[0].chan = 3;
2792 alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
2793 alu.src[1].value = (1ll << 32) / elements[i].instance_divisor + 1;
2794 alu.dst.sel = i + 1;
2795 alu.dst.chan = 3;
2796 alu.dst.write = 1;
2797 alu.last = 1;
2798 if ((r = r600_bytecode_add_alu(&bc, &alu))) {
