Lines Matching refs:lui
182 // specially coded on MIPS means that it is a lui/ori instruction, and that is
567 return opcode == LUI;
1343 lui(at, src.offset_ >> kLuiShift);
1449 void Assembler::lui(Register rd, int32_t j) {
1451 GenInstrImmediate(LUI, zero_reg, rd, j);
2100 lui(at, (imm32 & kHiMask) >> kLuiShift);
2127 // Interpret 2 instructions generated by li: lui/ori
2128 if ((GetOpcodeField(instr1) == LUI) && (GetOpcodeField(instr2) == ORI)) {
2149 // On Mips, a target address is stored in a lui/ori instruction pair, each
2165 CHECK((GetOpcodeField(instr1) == LUI && GetOpcodeField(instr2) == ORI));
2168 // Must use 2 instructions to insure patchable code => just use lui and ori.
2169 // lui rt, upper-16.
2171 *p = LUI | rt_code | ((itarget & kHiMask) >> kLuiShift);
2254 // Address pc points to lui/ori instructions.
2265 ASSERT(GetOpcodeField(instr1) == LUI);
2273 ASSERT(GetOpcodeField(instr1) == LUI);
