Lines Matching refs:eV
3072 case 2: /* call Ev */
3081 case 4: /* jmp Ev */
3086 case 6: /* PUSH Ev */
3128 case 2: /* call Ev */
3137 case 4: /* JMP Ev */
3142 case 6: /* PUSH Ev */
6190 /* Handle BT/BTS/BTR/BTC Gv, Ev. Apparently b-size is not
11679 IRTemp eV = newTemp(Ity_V128);
11687 assign( eV, getXMMReg( eregOfRM(modrm)) );
11693 assign( eV, loadLE(Ity_V128, mkexpr(addr)) );
11701 assign( addV, binop(Iop_Add32Fx4, mkexpr(gV), mkexpr(eV)) );
11702 assign( subV, binop(Iop_Sub32Fx4, mkexpr(gV), mkexpr(eV)) );
11713 IRTemp eV = newTemp(Ity_V128);
11722 assign( eV, getXMMReg( eregOfRM(modrm)) );
11728 assign( eV, loadLE(Ity_V128, mkexpr(addr)) );
11736 assign( addV, binop(Iop_Add64Fx2, mkexpr(gV), mkexpr(eV)) );
11737 assign( subV, binop(Iop_Sub64Fx2, mkexpr(gV), mkexpr(eV)) );
11752 IRTemp eV = newTemp(Ity_V128);
11762 assign( eV, getXMMReg( eregOfRM(modrm)) );
11768 assign( eV, loadLE(Ity_V128, mkexpr(addr)) );
11776 breakup128to32s( eV, &e3, &e2, &e1, &e0 );
11795 IRTemp eV = newTemp(Ity_V128);
11804 assign( eV, getXMMReg( eregOfRM(modrm)) );
11810 assign( eV, loadLE(Ity_V128, mkexpr(addr)) );
11818 assign( e1, unop(Iop_V128HIto64, mkexpr(eV) ));
11819 assign( e0, unop(Iop_V128to64, mkexpr(eV) ));
13373 case 0x69: /* IMUL Iv, Ev, Gv */
13376 case 0x6B: /* IMUL Ib, Ev, Gv */
13386 case 0x89: /* MOV Gv,Ev */
13394 case 0x8B: /* MOV Ev,Gv */
13477 case 0xC7: /* MOV Iv,Ev */
13562 /* ------------------------ opl Ev, Gv ----------------- */
13567 case 0x03: /* ADD Ev,Gv */
13574 case 0x0B: /* OR Ev,Gv */
13581 case 0x13: /* ADC Ev,Gv */
13588 case 0x1B: /* SBB Ev,Gv */
13595 case 0x23: /* AND Ev,Gv */
13602 case 0x2B: /* SUB Ev,Gv */
13609 case 0x33: /* XOR Ev,Gv */
13616 case 0x3B: /* CMP Ev,Gv */
13623 case 0x85: /* TEST Ev,Gv */
13627 /* ------------------------ opl Gv, Ev ----------------- */
13633 case 0x01: /* ADD Gv,Ev */
13642 case 0x09: /* OR Gv,Ev */
13651 case 0x11: /* ADC Gv,Ev */
13660 case 0x19: /* SBB Gv,Ev */
13669 case 0x21: /* AND Gv,Ev */
13678 case 0x29: /* SUB Gv,Ev */
13687 case 0x31: /* XOR Gv,Ev */
13696 case 0x39: /* CMP Gv,Ev */
14093 case 0xBC: /* REP BSF Gv,Ev */
14097 case 0xBD: /* REP BSR Gv,Ev */
14163 case 0x87: /* XCHG Gv,Ev */
14330 case 0x81: /* Grp1 Iv,Ev */
14338 case 0x83: /* Grp1 Ib,Ev */
14361 case 0xC1: { /* Grp2 Ib,Ev */
14386 case 0xD1: { /* Grp2 1,Ev */
14410 case 0xD3: { /* Grp2 CL,Ev */
14431 case 0xF7: { /* Grp3 Ev */
14451 case 0xFF: { /* Grp5 Ev */
14467 case 0xBA: { /* Grp8 Ib,Ev */
14481 case 0xBC: /* BSF Gv,Ev */
14484 case 0xBD: /* BSR Gv,Ev */
14511 case 0xA3: /* BT Gv,Ev */
14514 case 0xB3: /* BTR Gv,Ev */
14517 case 0xAB: /* BTS Gv,Ev */
14520 case 0xBB: /* BTC Gv,Ev */
14550 case 0xB1: /* CMPXCHG Gv,Ev */
14773 //-- case 0xC3: /* MOVNTI Gv,Ev */
14788 case 0xAF: /* IMUL Ev, Gv */
14942 case 0xA4: /* SHLDv imm8,Gv,Ev */
14951 case 0xA5: /* SHLDv %cl,Gv,Ev */
14959 case 0xAC: /* SHRDv imm8,Gv,Ev */
14968 case 0xAD: /* SHRDv %cl,Gv,Ev */
15009 case 0xC1: { /* XADD Gv,Ev */
