Lines Matching refs:vassert
62 vassert(r >= 0 && r < 16);
67 vassert(r >= 0 && r < 6);
72 vassert(r >= 0 && r < 16);
96 vassert(r >= 0 && r < 16);
219 vassert(shift >= 0 && shift <= 3);
629 vassert(op != Aalu_MUL);
670 default: vassert(0);
687 vassert(sz == 4 || sz == 8);
702 vassert(regparms >= 0 && regparms <= 6);
742 vassert(cond != Acc_ALWAYS);
761 vassert(szSmall == 1 || szSmall == 2 || szSmall == 4);
770 vassert(sz == 1 || sz == 2 || sz == 4);
798 vassert(sz == 8 || sz == 4 || sz == 2 || sz == 1);
806 vassert(sz == 8 || sz == 4);
815 vassert(nregs >= 1 && nregs <= 7);
825 vassert(szB == 8 || szB == 4);
862 vassert(sz == 4 || sz == 8);
872 vassert(szS == 4 || szS == 8);
873 vassert(szD == 4 || szD == 8);
883 vassert(szS == 4 || szS == 8);
884 vassert(szD == 4 || szD == 8);
904 vassert(sz == 4 || sz == 8 || sz == 16);
914 vassert(sz == 4 || sz == 8);
923 vassert(op != Asse_MOV);
932 vassert(op != Asse_MOV);
941 vassert(op != Asse_MOV);
950 vassert(op != Asse_MOV);
967 vassert(cond != Acc_ALWAYS);
976 vassert(order >= 0 && order <= 0xFF);
1012 vassert(mode64 == True);
1231 default: vassert(0);
1329 vassert(mode64 == True);
1367 vassert(i->Ain.Alu32R.op != Aalu_MOV);
1538 vassert(i->Ain.Sse32Fx4.op != Asse_MOV);
1547 vassert(i->Ain.Sse32FLo.op != Asse_MOV);
1556 vassert(i->Ain.Sse64Fx2.op != Asse_MOV);
1565 vassert(i->Ain.Sse64FLo.op != Asse_MOV);
1638 vassert(mode64 == True);
1858 vassert(offsetB >= 0);
1859 vassert(!hregIsVirtual(rreg));
1860 vassert(mode64 == True);
1880 vassert(offsetB >= 0);
1881 vassert(!hregIsVirtual(rreg));
1882 vassert(mode64 == True);
1905 vassert(hregClass(r) == HRcInt64);
1906 vassert(!hregIsVirtual(r));
1908 vassert(n <= 15);
1916 vassert(hregClass(r) == HRcInt64);
1917 vassert(!hregIsVirtual(r));
1919 vassert(n <= 15);
1927 vassert(hregClass(r) == HRcInt64);
1928 vassert(!hregIsVirtual(r));
1930 vassert(n <= 15);
1942 vassert(hregClass(r) == HRcVec128);
1943 vassert(!hregIsVirtual(r));
1945 vassert(n <= 15);
1953 //uu vassert(hregClass(r) == HRcVec256);
1954 //uu vassert(!hregIsVirtual(r));
1956 //uu vassert(n <= 15);
2147 vassert(0);
2217 //uu vassert(0);
2228 //uu vassert(0 == (vex >> 16));
2234 //uu vassert(0 == (vex >> 24));
2237 //uu vassert(0);
2246 vassert(n >= 0 && n <= 7);
2273 vassert(nbuf >= 32);
2274 vassert(mode64 == True);
2702 vassert(disp_cp_chain_me_to_slowEP != NULL);
2703 vassert(disp_cp_chain_me_to_fastEP != NULL);
2760 vassert(delta > 0 && delta < 40);
2773 vassert(disp_cp_xindir != NULL);
2815 vassert(delta > 0 && delta < 40);
2863 vassert(trcval != 0);
2878 vassert(delta > 0 && delta < 40);
2885 vassert(i->Ain.CMov64.cond != Acc_ALWAYS);
2958 vassert(reg < 16);
3025 vassert(i->Ain.A87Free.nregs > 0 && i->Ain.A87Free.nregs <= 7);
3032 vassert(i->Ain.A87PushPop.szB == 8 || i->Ain.A87PushPop.szB == 4);
3124 vassert(i->Ain.SseUComIS.sz == 4);
3184 vassert(0);
3194 vassert(i->Ain.SseLdzLO.sz == 4 || i->Ain.SseLdzLO.sz == 8);
3453 vassert(p - p0 == 3);
3457 vassert(p - p0 == 5);
3466 vassert(p - p0 == 8); /* also ensures that 0x03 offset above is ok */
3468 vassert(evCheckSzB_AMD64() == 8);
3486 vassert(!(*is_profInc));
3501 vassert(p - &buf[0] <= 32);
3531 vassert(p[0] == 0x49);
3532 vassert(p[1] == 0xBB);
3533 vassert(*(ULong*)(&p[2]) == Ptr_to_ULong(disp_cp_chain_me_EXPECTED));
3534 vassert(p[10] == 0x41);
3535 vassert(p[11] == 0xFF);
3536 vassert(p[12] == 0xD3);
3592 vassert(delta == 0LL || delta == -1LL);
3647 vassert(valid);
3672 vassert(sizeof(ULong*) == 8);
3674 vassert(p[0] == 0x49);
3675 vassert(p[1] == 0xBB);
3676 vassert(p[2] == 0x00);
3677 vassert(p[3] == 0x00);
3678 vassert(p[4] == 0x00);
3679 vassert(p[5] == 0x00);
3680 vassert(p[6] == 0x00);
3681 vassert(p[7] == 0x00);
3682 vassert(p[8] == 0x00);
3683 vassert(p[9] == 0x00);
3684 vassert(p[10] == 0x49);
3685 vassert(p[11] == 0xFF);
3686 vassert(p[12] == 0x03);
