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    Searched defs:inst_mul (Results 1 - 4 of 4) sorted by null

  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/
radeon_program_tex.c 84 struct rc_instruction *inst_mul, *inst_rcp; local
99 inst_mul = rc_insert_new_instruction(&compiler->Base, inst->Prev);
100 inst_mul->U.I.Opcode = RC_OPCODE_MUL;
101 inst_mul->U.I.DstReg.File = RC_FILE_TEMPORARY;
102 inst_mul->U.I.DstReg.Index = temp;
103 inst_mul->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
104 inst_mul->U.I.SrcReg[1].File = RC_FILE_TEMPORARY;
105 inst_mul->U.I.SrcReg[1].Index = temp;
106 inst_mul->U.I.SrcReg[1].Swizzle = RC_SWIZZLE_WWWW;
159 struct rc_instruction *inst_mul, *inst_add, *inst_cmp local
325 struct rc_instruction *inst_mul, *inst_frc, *inst_mad, *inst_add; local
443 struct rc_instruction *inst_mul, *inst_mad, *inst_cnd; local
    [all...]
radeon_compiler.c 240 struct rc_instruction * inst_mul; local
259 inst_mul = rc_insert_new_instruction(c, inst_rcp);
260 inst_mul->U.I.Opcode = RC_OPCODE_MUL;
262 inst_mul->U.I.DstReg.File = RC_FILE_TEMPORARY;
263 inst_mul->U.I.DstReg.Index = tempregi;
264 inst_mul->U.I.DstReg.WriteMask = RC_MASK_XYZ;
266 inst_mul->U.I.SrcReg[0].File = RC_FILE_INPUT;
267 inst_mul->U.I.SrcReg[0].Index = new_input;
269 inst_mul->U.I.SrcReg[1].File = RC_FILE_TEMPORARY;
270 inst_mul->U.I.SrcReg[1].Index = tempregi
    [all...]
  /external/mesa3d/src/gallium/drivers/r300/compiler/
radeon_program_tex.c 84 struct rc_instruction *inst_mul, *inst_rcp; local
99 inst_mul = rc_insert_new_instruction(&compiler->Base, inst->Prev);
100 inst_mul->U.I.Opcode = RC_OPCODE_MUL;
101 inst_mul->U.I.DstReg.File = RC_FILE_TEMPORARY;
102 inst_mul->U.I.DstReg.Index = temp;
103 inst_mul->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
104 inst_mul->U.I.SrcReg[1].File = RC_FILE_TEMPORARY;
105 inst_mul->U.I.SrcReg[1].Index = temp;
106 inst_mul->U.I.SrcReg[1].Swizzle = RC_SWIZZLE_WWWW;
159 struct rc_instruction *inst_mul, *inst_add, *inst_cmp local
325 struct rc_instruction *inst_mul, *inst_frc, *inst_mad, *inst_add; local
443 struct rc_instruction *inst_mul, *inst_mad, *inst_cnd; local
    [all...]
radeon_compiler.c 240 struct rc_instruction * inst_mul; local
259 inst_mul = rc_insert_new_instruction(c, inst_rcp);
260 inst_mul->U.I.Opcode = RC_OPCODE_MUL;
262 inst_mul->U.I.DstReg.File = RC_FILE_TEMPORARY;
263 inst_mul->U.I.DstReg.Index = tempregi;
264 inst_mul->U.I.DstReg.WriteMask = RC_MASK_XYZ;
266 inst_mul->U.I.SrcReg[0].File = RC_FILE_INPUT;
267 inst_mul->U.I.SrcReg[0].Index = new_input;
269 inst_mul->U.I.SrcReg[1].File = RC_FILE_TEMPORARY;
270 inst_mul->U.I.SrcReg[1].Index = tempregi
    [all...]

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