1 /* Low level interface to valgrind, for the remote server for GDB integrated 2 in valgrind. 3 Copyright (C) 2012 4 Free Software Foundation, Inc. 5 6 This file is part of VALGRIND. 7 It has been inspired from a file from gdbserver in gdb 6.6. 8 9 This program is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 2 of the License, or 12 (at your option) any later version. 13 14 This program is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; if not, write to the Free Software 21 Foundation, Inc., 51 Franklin Street, Fifth Floor, 22 Boston, MA 02110-1301, USA. */ 23 24 #include "server.h" 25 #include "target.h" 26 #include "regdef.h" 27 #include "regcache.h" 28 29 #include "pub_core_aspacemgr.h" 30 #include "pub_tool_machine.h" 31 #include "pub_core_threadstate.h" 32 #include "pub_core_transtab.h" 33 #include "pub_core_gdbserver.h" 34 35 #include "valgrind_low.h" 36 37 #include "libvex_guest_mips32.h" 38 39 static struct reg regs[] = { 40 { "r0", 0, 32 }, 41 { "r1", 32, 32 }, 42 { "r2", 64, 32 }, 43 { "r3", 96, 32 }, 44 { "r4", 128, 32 }, 45 { "r5", 160, 32 }, 46 { "r6", 192, 32 }, 47 { "r7", 224, 32 }, 48 { "r8", 256, 32 }, 49 { "r9", 288, 32 }, 50 { "r10", 320, 32 }, 51 { "r11", 352, 32 }, 52 { "r12", 384, 32 }, 53 { "r13", 416, 32 }, 54 { "r14", 448, 32 }, 55 { "r15", 480, 32 }, 56 { "r16", 512, 32 }, 57 { "r17", 544, 32 }, 58 { "r18", 576, 32 }, 59 { "r19", 608, 32 }, 60 { "r20", 640, 32 }, 61 { "r21", 672, 32 }, 62 { "r22", 704, 32 }, 63 { "r23", 736, 32 }, 64 { "r24", 768, 32 }, 65 { "r25", 800, 32 }, 66 { "r26", 832, 32 }, 67 { "r27", 864, 32 }, 68 { "r28", 896, 32 }, 69 { "r29", 928, 32 }, 70 { "r30", 960, 32 }, 71 { "r31", 992, 32 }, 72 { "status", 1024, 32 }, 73 { "lo", 1056, 32 }, 74 { "hi", 1088, 32 }, 75 { "badvaddr", 1120, 32 }, 76 { "cause", 1152, 32 }, 77 { "pc", 1184, 32 }, 78 { "f0", 1216, 32 }, 79 { "f1", 1248, 32 }, 80 { "f2", 1280, 32 }, 81 { "f3", 1312, 32 }, 82 { "f4", 1344, 32 }, 83 { "f5", 1376, 32 }, 84 { "f6", 1408, 32 }, 85 { "f7", 1440, 32 }, 86 { "f8", 1472, 32 }, 87 { "f9", 1504, 32 }, 88 { "f10", 1536, 32 }, 89 { "f11", 1568, 32 }, 90 { "f12", 1600, 32 }, 91 { "f13", 1632, 32 }, 92 { "f14", 1664, 32 }, 93 { "f15", 1696, 32 }, 94 { "f16", 1728, 32 }, 95 { "f17", 1760, 32 }, 96 { "f18", 1792, 32 }, 97 { "f19", 1824, 32 }, 98 { "f20", 1856, 32 }, 99 { "f21", 1888, 32 }, 100 { "f22", 1920, 32 }, 101 { "f23", 1952, 32 }, 102 { "f24", 1984, 32 }, 103 { "f25", 2016, 32 }, 104 { "f26", 2048, 32 }, 105 { "f27", 2080, 32 }, 106 { "f28", 2112, 32 }, 107 { "f29", 2144, 32 }, 108 { "f30", 2176, 32 }, 109 { "f31", 2208, 32 }, 110 { "fcsr", 2240, 32 }, 111 { "fir", 2272, 32 }, 112 { "restart", 2304, 32 }, 113 }; 114 115 #define num_regs (sizeof (regs) / sizeof (regs[0])) 116 117 static const char *expedite_regs[] = { "r29", "pc", 0 }; 118 119 static 120 CORE_ADDR get_pc (void) 121 { 122 unsigned long pc; 123 124 collect_register_by_name ("pc", &pc); 125 126 dlog(1, "stop pc is %p\n", (void *) pc); 127 return pc; 128 } 129 130 static 131 void set_pc (CORE_ADDR newpc) 132 { 133 Bool mod; 134 supply_register_by_name ("pc", &newpc, &mod); 135 if (mod) 136 dlog(1, "set pc to %p\n", C2v (newpc)); 137 else 138 dlog(1, "set pc not changed %p\n", C2v (newpc)); 139 } 140 141 /* store registers in the guest state (gdbserver_to_valgrind) 142 or fetch register from the guest state (valgrind_to_gdbserver). */ 143 static 144 void transfer_register (ThreadId tid, int abs_regno, void * buf, 145 transfer_direction dir, int size, Bool *mod) 146 { 147 ThreadState* tst = VG_(get_ThreadState)(tid); 148 int set = abs_regno / num_regs; 149 int regno = abs_regno % num_regs; 150 *mod = False; 151 152 VexGuestMIPS32State* mips1 = (VexGuestMIPS32State*) get_arch (set, tst); 153 154 switch (regno) { 155 case 0: VG_(transfer) (&mips1->guest_r0, buf, dir, size, mod); break; 156 case 1: VG_(transfer) (&mips1->guest_r1, buf, dir, size, mod); break; 157 case 2: VG_(transfer) (&mips1->guest_r2, buf, dir, size, mod); break; 158 case 3: VG_(transfer) (&mips1->guest_r3, buf, dir, size, mod); break; 159 case 4: VG_(transfer) (&mips1->guest_r4, buf, dir, size, mod); break; 160 case 5: VG_(transfer) (&mips1->guest_r5, buf, dir, size, mod); break; 161 case 6: VG_(transfer) (&mips1->guest_r6, buf, dir, size, mod); break; 162 case 7: VG_(transfer) (&mips1->guest_r7, buf, dir, size, mod); break; 163 case 8: VG_(transfer) (&mips1->guest_r8, buf, dir, size, mod); break; 164 case 9: VG_(transfer) (&mips1->guest_r9, buf, dir, size, mod); break; 165 case 10: VG_(transfer) (&mips1->guest_r10, buf, dir, size, mod); break; 166 case 11: VG_(transfer) (&mips1->guest_r11, buf, dir, size, mod); break; 167 case 12: VG_(transfer) (&mips1->guest_r12, buf, dir, size, mod); break; 168 case 13: VG_(transfer) (&mips1->guest_r13, buf, dir, size, mod); break; 169 case 14: VG_(transfer) (&mips1->guest_r14, buf, dir, size, mod); break; 170 case 15: VG_(transfer) (&mips1->guest_r15, buf, dir, size, mod); break; 171 case 16: VG_(transfer) (&mips1->guest_r16, buf, dir, size, mod); break; 172 case 17: VG_(transfer) (&mips1->guest_r17, buf, dir, size, mod); break; 173 case 18: VG_(transfer) (&mips1->guest_r18, buf, dir, size, mod); break; 174 case 19: VG_(transfer) (&mips1->guest_r19, buf, dir, size, mod); break; 175 case 20: VG_(transfer) (&mips1->guest_r20, buf, dir, size, mod); break; 176 case 21: VG_(transfer) (&mips1->guest_r21, buf, dir, size, mod); break; 177 case 22: VG_(transfer) (&mips1->guest_r22, buf, dir, size, mod); break; 178 case 23: VG_(transfer) (&mips1->guest_r23, buf, dir, size, mod); break; 179 case 24: VG_(transfer) (&mips1->guest_r24, buf, dir, size, mod); break; 180 case 25: VG_(transfer) (&mips1->guest_r25, buf, dir, size, mod); break; 181 case 26: VG_(transfer) (&mips1->guest_r26, buf, dir, size, mod); break; 182 case 27: VG_(transfer) (&mips1->guest_r27, buf, dir, size, mod); break; 183 case 28: VG_(transfer) (&mips1->guest_r28, buf, dir, size, mod); break; 184 case 29: VG_(transfer) (&mips1->guest_r29, buf, dir, size, mod); break; 185 case 30: VG_(transfer) (&mips1->guest_r30, buf, dir, size, mod); break; 186 case 31: VG_(transfer) (&mips1->guest_r31, buf, dir, size, mod); break; 187 case 32: *mod = False; break; // GDBTD???? VEX { "status", 1024, 32 }, 188 case 33: VG_(transfer) (&mips1->guest_LO, buf, dir, size, mod); break; 189 case 34: VG_(transfer) (&mips1->guest_HI, buf, dir, size, mod); break; 190 case 35: *mod = False; break; // GDBTD???? VEX { "badvaddr", 1120, 32 }, 191 case 36: *mod = False; break; // GDBTD???? VEX { "cause", 1152, 32 }, 192 case 37: VG_(transfer) (&mips1->guest_PC, buf, dir, size, mod); break; 193 case 38: VG_(transfer) (&mips1->guest_f0, buf, dir, size, mod); break; 194 case 39: VG_(transfer) (&mips1->guest_f1, buf, dir, size, mod); break; 195 case 40: VG_(transfer) (&mips1->guest_f2, buf, dir, size, mod); break; 196 case 41: VG_(transfer) (&mips1->guest_f3, buf, dir, size, mod); break; 197 case 42: VG_(transfer) (&mips1->guest_f4, buf, dir, size, mod); break; 198 case 43: VG_(transfer) (&mips1->guest_f5, buf, dir, size, mod); break; 199 case 44: VG_(transfer) (&mips1->guest_f6, buf, dir, size, mod); break; 200 case 45: VG_(transfer) (&mips1->guest_f7, buf, dir, size, mod); break; 201 case 46: VG_(transfer) (&mips1->guest_f8, buf, dir, size, mod); break; 202 case 47: VG_(transfer) (&mips1->guest_f9, buf, dir, size, mod); break; 203 case 48: VG_(transfer) (&mips1->guest_f10, buf, dir, size, mod); break; 204 case 49: VG_(transfer) (&mips1->guest_f11, buf, dir, size, mod); break; 205 case 50: VG_(transfer) (&mips1->guest_f12, buf, dir, size, mod); break; 206 case 51: VG_(transfer) (&mips1->guest_f13, buf, dir, size, mod); break; 207 case 52: VG_(transfer) (&mips1->guest_f14, buf, dir, size, mod); break; 208 case 53: VG_(transfer) (&mips1->guest_f15, buf, dir, size, mod); break; 209 case 54: VG_(transfer) (&mips1->guest_f16, buf, dir, size, mod); break; 210 case 55: VG_(transfer) (&mips1->guest_f17, buf, dir, size, mod); break; 211 case 56: VG_(transfer) (&mips1->guest_f18, buf, dir, size, mod); break; 212 case 57: VG_(transfer) (&mips1->guest_f19, buf, dir, size, mod); break; 213 case 58: VG_(transfer) (&mips1->guest_f20, buf, dir, size, mod); break; 214 case 59: VG_(transfer) (&mips1->guest_f21, buf, dir, size, mod); break; 215 case 60: VG_(transfer) (&mips1->guest_f22, buf, dir, size, mod); break; 216 case 61: VG_(transfer) (&mips1->guest_f23, buf, dir, size, mod); break; 217 case 62: VG_(transfer) (&mips1->guest_f24, buf, dir, size, mod); break; 218 case 63: VG_(transfer) (&mips1->guest_f25, buf, dir, size, mod); break; 219 case 64: VG_(transfer) (&mips1->guest_f26, buf, dir, size, mod); break; 220 case 65: VG_(transfer) (&mips1->guest_f27, buf, dir, size, mod); break; 221 case 66: VG_(transfer) (&mips1->guest_f28, buf, dir, size, mod); break; 222 case 67: VG_(transfer) (&mips1->guest_f29, buf, dir, size, mod); break; 223 case 68: VG_(transfer) (&mips1->guest_f30, buf, dir, size, mod); break; 224 case 69: VG_(transfer) (&mips1->guest_f31, buf, dir, size, mod); break; 225 case 70: VG_(transfer) (&mips1->guest_FCSR, buf, dir, size, mod); break; 226 case 71: VG_(transfer) (&mips1->guest_FIR, buf, dir, size, mod); break; 227 case 72: *mod = False; break; // GDBTD???? VEX{ "restart", 2304, 32 }, 228 default: VG_(printf)("regno: %d\n", regno); vg_assert(0); 229 } 230 } 231 232 static 233 char* target_xml (Bool shadow_mode) 234 { 235 if (shadow_mode) { 236 return "mips-linux-valgrind.xml"; 237 } else { 238 return "mips-linux.xml"; 239 } 240 } 241 242 static struct valgrind_target_ops low_target = { 243 num_regs, 244 regs, 245 29, //sp = r29, which is register offset 29 in regs 246 transfer_register, 247 get_pc, 248 set_pc, 249 "mips", 250 target_xml 251 }; 252 253 void mips32_init_architecture (struct valgrind_target_ops *target) 254 { 255 *target = low_target; 256 set_register_cache (regs, num_regs); 257 gdbserver_expedite_regs = expedite_regs; 258 } 259
