| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 26 case ISD::SHL: return ARM_AM::lsl;
|
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| RegOps.java | 115 public static final int SHL = 23;
336 case SHL: return "shl";
|
| DexTranslationAdvice.java | 81 case RegOps.SHL:
|
| /dalvik/dx/src/com/android/dx/rop/code/ |
| RegOps.java | 115 public static final int SHL = 23;
336 case SHL: return "shl";
|
| DexTranslationAdvice.java | 88 case RegOps.SHL:
|
| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| RegOps.java | 115 public static final int SHL = 23;
336 case SHL: return "shl";
|
| DexTranslationAdvice.java | 88 case RegOps.SHL:
|
| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 180 { ISD::SHL, MVT::v4i32, 1 },
183 { ISD::SHL, MVT::v8i32, 1 },
186 { ISD::SHL, MVT::v2i64, 1 },
188 { ISD::SHL, MVT::v4i64, 1 },
191 { ISD::SHL, MVT::v32i8, 42 }, // cmpeqb sequence.
192 { ISD::SHL, MVT::v16i16, 16*10 }, // Scalarized.
224 { ISD::SHL, MVT::v16i8, 1 }, // psllw.
225 { ISD::SHL, MVT::v8i16, 1 }, // psllw.
226 { ISD::SHL, MVT::v4i32, 1 }, // pslld
227 { ISD::SHL, MVT::v2i64, 1 }, // psllq
[all...] |
| /external/chromium_org/third_party/opus/src/celt/ |
| fixed_c5x.h | 71 #define MULT16_32_Q15(a,b) ADD32(SHL(MULT16_16((a),SHR((b),16)),1), SHR(MULT16_16SU((a),(b)),15))
|
| fixed_generic.h | 46 #define MULT16_32_Q15(a,b) ADD32(SHL(MULT16_16((a),SHR((b),16)),1), SHR(MULT16_16SU((a),((b)&0x0000ffff)),15))
49 #define MULT32_32_Q31(a,b) ADD32(ADD32(SHL(MULT16_16(SHR((a),16),SHR((b),16)),1), SHR(MULT16_16SU(SHR((a),16),((b)&0x0000ffff)),15)), SHR(MULT16_16SU(SHR((b),16),((a)&0x0000ffff)),15))
83 #define SHL(a,shift) SHL32(a,shift)
|
| arch.h | 164 #define SHL(a,shift) (a)
|
| /external/libvpx/libvpx/build/make/ |
| ads2gas_apple.pl | 64 # Convert :SHL: to <<
65 s/:SHL:/ << /g;
|
| ads2gas.pl | 72 # Convert :SHL: to <<
73 s/:SHL:/ << /g;
|
| /external/chromium_org/v8/src/ |
| token.h | 99 T(SHL, "<<", 11) \
288 return (SHL <= op) && (op <= SHR);
|
| /external/v8/src/ |
| token.h | 99 T(SHL, "<<", 11) \
269 return (SHL <= op) && (op <= SHR);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
| tgsi_opcode_tmp.h | 122 OP12(SHL)
|
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 306 SHL, SRA, SRL, ROTL, ROTR,
370 /// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 64 /// SHL, SRA, SRL - Non-constant shifts.
65 SHL, SRA, SRL
|
| MSP430ISelLowering.cpp | 96 setOperationAction(ISD::SHL, MVT::i8, Custom);
99 setOperationAction(ISD::SHL, MVT::i16, Custom);
190 case ISD::SHL: // FALLTHROUGH
637 case ISD::SHL:
638 return DAG.getNode(MSP430ISD::SHL, dl,
663 Victim = DAG.getNode((Opc == ISD::SHL ? MSP430ISD::RLA : MSP430ISD::RRA),
[all...] |
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_opcode_tmp.h | 122 OP12(SHL)
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeIntegerTypes.cpp | 71 case ISD::SHL: Res = PromoteIntRes_SHL(N); break;
548 return DAG.getNode(ISD::SHL, SDLoc(N), Res.getValueType(), Res, Amt);
740 Part = DAG.getNode(ISD::SHL, dl, NVT, Part,
[all...] |
| LegalizeVectorOps.cpp | 208 case ISD::SHL:
465 Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt);
484 Lo = DAG.getNode(ISD::SHL, dl, WideVT, Lo, ShAmt);
635 // Make sure that the SRA and SHL instructions are available.
637 TLI.getOperationAction(ISD::SHL, VT) == TargetLowering::Expand)
648 Op = DAG.getNode(ISD::SHL, DL, VT, Op, ShiftSz);
716 // Notice that we can also use SHL+SHR, but using a constant is slightly
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 371 if (Opcode == ISD::SHL) {
422 if (Op0.getOperand(0).getOpcode() == ISD::SHL ||
424 if (Op1.getOperand(0).getOpcode() != ISD::SHL &&
431 } else if (Op0Opc == ISD::SHL || Op0Opc == ISD::SRL) {
432 if (Op1Opc == ISD::AND && Op1.getOperand(0).getOpcode() != ISD::SHL &&
444 if ((Op1Opc == ISD::SHL || Op1Opc == ISD::SRL) &&
447 SH = (Op1Opc == ISD::SHL) ? Value : 32 - Value;
451 if ((SHOpc == ISD::SHL || SHOpc == ISD::SRL) &&
456 SH = (SHOpc == ISD::SHL) ? Value : 32 - Value;
[all...] |
| /external/speex/libspeex/ |
| arch.h | 178 #define SHL(a,shift) (a)
|
| fixed_generic.h | 60 #define SHL(a,shift) ((spx_word32_t)(a) << (shift))
|
