| /hardware/qcom/media/mm-video-legacy/vidc/venc/src/ |
| omx_video_base.cpp | 815 BITMASK_SET(&m_flags, OMX_COMPONENT_IDLE_PENDING);
889 BITMASK_SET(&m_flags, OMX_COMPONENT_LOADING_PENDING);
905 BITMASK_SET(&m_flags,OMX_COMPONENT_EXECUTE_PENDING);
940 BITMASK_SET(&m_flags,OMX_COMPONENT_PAUSE_PENDING);
972 BITMASK_SET(&m_flags,OMX_COMPONENT_IDLE_PENDING);
990 BITMASK_SET(&m_flags,OMX_COMPONENT_PAUSE_PENDING);
[all...] |
| /hardware/qcom/media/mm-video-v4l2/vidc/venc/src/ |
| omx_video_base.cpp | 744 BITMASK_SET(&m_flags, OMX_COMPONENT_IDLE_PENDING);
805 BITMASK_SET(&m_flags, OMX_COMPONENT_LOADING_PENDING);
817 BITMASK_SET(&m_flags,OMX_COMPONENT_EXECUTE_PENDING)
[all...] |
| /hardware/qcom/media/mm-video-legacy/vidc/vdec/src/ |
| omx_vdec.cpp | 703 BITMASK_SET(&pThis->m_flags, OMX_COMPONENT_DISABLE_OUTPUT_DEFERRED);
[all...] |
| omx_vdec_copper.cpp | 707 BITMASK_SET(&pThis->m_flags, OMX_COMPONENT_DISABLE_OUTPUT_DEFERRED);
[all...] |
| /hardware/qcom/media/mm-video-v4l2/vidc/vdec/src/ |
| omx_vdec.cpp | 707 BITMASK_SET(&pThis->m_flags, OMX_COMPONENT_DISABLE_OUTPUT_DEFERRED);
[all...] |
| omx_vdec_hevc.cpp | 810 BITMASK_SET(&pThis->m_flags, OMX_COMPONENT_DISABLE_OUTPUT_DEFERRED);
[all...] |
| omx_vdec_msm8974.cpp | 850 BITMASK_SET(&pThis->m_flags, OMX_COMPONENT_DISABLE_OUTPUT_DEFERRED);
[all...] |
| /hardware/qcom/media/mm-video-legacy/vidc/venc/inc/ |
| omx_video_base.h | 135 #define BITMASK_SET(mArray,mIndex) (mArray)[BITMASK_OFFSET(mIndex)] \
|
| /hardware/qcom/media/mm-video-v4l2/vidc/venc/inc/ |
| omx_video_base.h | 131 #define BITMASK_SET(mArray,mIndex) (mArray)[BITMASK_OFFSET(mIndex)] \
|
| /hardware/qcom/media/mm-video-legacy/vidc/vdec/inc/ |
| omx_vdec.h | 169 #define BITMASK_SET(mArray,mIndex) (mArray)[BITMASK_OFFSET(mIndex)] \
|
| /hardware/qcom/media/mm-video-v4l2/vidc/vdec/inc/ |
| omx_vdec_hevc.h | 157 #define BITMASK_SET(mArray,mIndex) (mArray)[BITMASK_OFFSET(mIndex)] \
[all...] |
| omx_vdec.h | 163 #define BITMASK_SET(mArray,mIndex) (mArray)[BITMASK_OFFSET(mIndex)] \
[all...] |
