/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 488 /// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in 492 BR_CC, [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.h | 58 BR_CC,
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MSP430ISelLowering.cpp | 109 setOperationAction(ISD::BR_CC, MVT::i8, Custom); 110 setOperationAction(ISD::BR_CC, MVT::i16, Custom); 197 case ISD::BR_CC: return LowerBR_CC(Op, DAG); 793 return DAG.getNode(MSP430ISD::BR_CC, dl, Op.getValueType(), [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.h | 33 BR_CC, 76 /// BR_CC instructions. Second, it gives a legal instruction for the actual
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AArch64ISelLowering.cpp | 97 setOperationAction(ISD::BR_CC, MVT::i32, Custom); 98 setOperationAction(ISD::BR_CC, MVT::i64, Custom); 99 setOperationAction(ISD::BR_CC, MVT::f32, Custom); 100 setOperationAction(ISD::BR_CC, MVT::f64, Custom); 233 setOperationAction(ISD::BR_CC, MVT::f128, Custom); 806 case AArch64ISD::BR_CC: return "AArch64ISD::BR_CC"; [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
R600ISelLowering.cpp | 36 setOperationAction(ISD::BR_CC, MVT::i32, Custom); 249 case ISD::BR_CC: return LowerBR_CC(Op, DAG);
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SIISelLowering.cpp | 47 setOperationAction(ISD::BR_CC, MVT::i32, Custom); 265 case ISD::BR_CC: return LowerBR_CC(Op, DAG);
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/external/mesa3d/src/gallium/drivers/radeon/ |
R600ISelLowering.cpp | 36 setOperationAction(ISD::BR_CC, MVT::i32, Custom); 249 case ISD::BR_CC: return LowerBR_CC(Op, DAG);
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SIISelLowering.cpp | 47 setOperationAction(ISD::BR_CC, MVT::i32, Custom); 265 case ISD::BR_CC: return LowerBR_CC(Op, DAG);
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/external/llvm/lib/Target/NVPTX/ |
NVPTXISelLowering.cpp | 134 setOperationAction(ISD::BR_CC, MVT::f32, Expand); 135 setOperationAction(ISD::BR_CC, MVT::f64, Expand); 136 setOperationAction(ISD::BR_CC, MVT::i1, Expand); 137 setOperationAction(ISD::BR_CC, MVT::i8, Expand); 138 setOperationAction(ISD::BR_CC, MVT::i16, Expand); 139 setOperationAction(ISD::BR_CC, MVT::i32, Expand); 140 setOperationAction(ISD::BR_CC, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 249 case ISD::BR_CC: return "br_cc";
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LegalizeDAG.cpp | [all...] |
LegalizeFloatTypes.cpp | 610 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break; [all...] |
LegalizeIntegerTypes.cpp | 781 case ISD::BR_CC: Res = PromoteIntOp_BR_CC(N, OpNo); break; [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/lib/Target/R600/ |
R600ISelLowering.cpp | 56 setOperationAction(ISD::BR_CC, MVT::i32, Expand); 57 setOperationAction(ISD::BR_CC, MVT::f32, Expand); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 297 setOperationAction(ISD::BR_CC, MVT::f32, Expand); 298 setOperationAction(ISD::BR_CC, MVT::f64, Expand); 299 setOperationAction(ISD::BR_CC, MVT::i32, Expand); 300 setOperationAction(ISD::BR_CC, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelDAGToDAG.cpp | [all...] |
PPCISelLowering.cpp | 528 setTargetDAGCombine(ISD::BR_CC); [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 92 // Lower SELECT_CC and BR_CC into separate comparisons and branches. 94 setOperationAction(ISD::BR_CC, VT, Custom); 102 // Expand BRCOND into a BR_CC (see above). [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | 434 setOperationAction(ISD::BR_CC , MVT::f32, Expand); 435 setOperationAction(ISD::BR_CC , MVT::f64, Expand); 436 setOperationAction(ISD::BR_CC , MVT::f80, Expand); 437 setOperationAction(ISD::BR_CC , MVT::i8, Expand); 438 setOperationAction(ISD::BR_CC , MVT::i16, Expand); 439 setOperationAction(ISD::BR_CC , MVT::i32, Expand); 440 setOperationAction(ISD::BR_CC , MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 89 setOperationAction(ISD::BR_CC, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |