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    Searched refs:CP0C1_IL (Results 1 - 2 of 2) sorted by null

/external/qemu/target-mips/
translate_init.c	106 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | 127 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | 146 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | 165 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | 185 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | 205 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | 225 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | 246 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | 269 (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | 353 (1 << CP0C1_IS) | (4 << CP0C1_IL) | (1 << CP0C1_IA)     [all...]
cpu.h	339 #define CP0C1_IL 19

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