| /external/llvm/include/llvm/MC/ |
| MCInstrInfo.h | 17 #include "llvm/MC/MCInstrDesc.h"
27 const MCInstrDesc *Desc; // Raw array to allow static init'n
35 void InitMCInstrInfo(const MCInstrDesc *D, const unsigned *NI, const char *ND,
48 const MCInstrDesc &get(unsigned Opcode) const {
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCInst.h | 27 const MCInstrDesc *MCID;
35 HexagonMCInst(const MCInstrDesc& mcid):
50 void setDesc(const MCInstrDesc& mcid) { MCID = &mcid; };
51 const MCInstrDesc& getDesc(void) const { return *MCID; };
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| /external/llvm/include/llvm/CodeGen/ |
| DFAPacketizer.h | 35 class MCInstrDesc;
66 // canReserveResources - Check if the resources occupied by a MCInstrDesc
68 bool canReserveResources(const llvm::MCInstrDesc *MID);
70 // reserveResources - Reserve the resources occupied by a MCInstrDesc and
72 void reserveResources(const llvm::MCInstrDesc *MID);
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| MachineInstrBuilder.h | 26 class MCInstrDesc;
225 const MCInstrDesc &MCID) {
234 const MCInstrDesc &MCID,
247 const MCInstrDesc &MCID,
258 const MCInstrDesc &MCID,
269 const MCInstrDesc &MCID,
287 const MCInstrDesc &MCID) {
297 const MCInstrDesc &MCID) {
307 const MCInstrDesc &MCID) {
323 const MCInstrDesc &MCID)
[all...] |
| ScheduleDAG.h | 38 class MCInstrDesc;
562 /// getInstrDesc - Return the MCInstrDesc of this SUnit.
564 const MCInstrDesc *getInstrDesc(const SUnit *SU) const {
595 // Return the MCInstrDesc of this SDNode or NULL.
596 const MCInstrDesc *getNodeDesc(const SDNode *Node) const;
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| MachineInstr.h | 27 #include "llvm/MC/MCInstrDesc.h"
70 const MCInstrDesc *MCID; // Instruction descriptor.
111 /// MCInstrDesc. An explicit DebugLoc is supplied.
112 MachineInstr(MachineFunction&, const MCInstrDesc &MCID,
257 const MCInstrDesc &getDesc() const { return *MCID; }
301 /// API for querying MachineInstr properties. They are the same as MCInstrDesc
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| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.cpp | 22 const MCInstrDesc &MCID = MI->getDesc();
43 const MCInstrDesc &MCID = MI->getDesc();
46 const MCInstrDesc &LastMCID = LastMI->getDesc();
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| ARMBaseInstrInfo.h | 246 const MCInstrDesc &DefMCID,
250 const MCInstrDesc &DefMCID,
254 const MCInstrDesc &UseMCID,
258 const MCInstrDesc &UseMCID,
262 const MCInstrDesc &DefMCID,
264 const MCInstrDesc &UseMCID,
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| ARMCodeEmitter.cpp | 101 const MCInstrDesc &MCID,
107 const MCInstrDesc &MCID) const;
281 const MCInstrDesc &MCID = MI.getDesc();
487 const MCInstrDesc &MCID = MI.getDesc();
823 const MCInstrDesc &MCID = MI.getDesc();
850 const MCInstrDesc &MCID = MI.getDesc();
[all...] |
| MLxExpansionPass.cpp | 186 const MCInstrDesc &MCID = MI->getDesc();
286 const MCInstrDesc &MCID1 = TII->get(MulOpc);
287 const MCInstrDesc &MCID2 = TII->get(AddSubOpc);
343 const MCInstrDesc &MCID = MI->getDesc();
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| Thumb2SizeReduction.cpp | 213 static bool HasImplicitCPSRDef(const MCInstrDesc &MCID) {
551 const MCInstrDesc &MCID = MI->getDesc();
686 const MCInstrDesc &NewMCID = TII->get(Entry.NarrowOpc2);
700 const MCInstrDesc &MCID = MI->getDesc();
764 const MCInstrDesc &MCID = MI->getDesc();
783 const MCInstrDesc &NewMCID = TII->get(Entry.NarrowOpc1);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 26 class MCInstrDesc;
54 const MCInstrDesc &II,
69 const MCInstrDesc *II,
80 const MCInstrDesc *II,
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| InstrEmitter.cpp | 132 const MCInstrDesc &II = TII->get(User->getMachineOpcode());
208 const MCInstrDesc &II,
273 // IMPLICIT_DEF can produce any type of result so its MCInstrDesc
298 const MCInstrDesc *II,
308 const MCInstrDesc &MCID = MIB->getDesc();
360 const MCInstrDesc *II,
596 const MCInstrDesc &II = TII->get(TargetOpcode::REG_SEQUENCE);
646 const MCInstrDesc &II = TII->get(TargetOpcode::DBG_VALUE);
723 const MCInstrDesc &II = TII->get(Opc);
[all...] |
| FastISel.cpp | 669 const MCInstrDesc &II = TII.get(TargetOpcode::DBG_VALUE);
[all...] |
| /external/llvm/lib/CodeGen/ |
| DFAPacketizer.cpp | 64 // canReserveResources - Check if the resources occupied by a MCInstrDesc
66 bool DFAPacketizer::canReserveResources(const llvm::MCInstrDesc *MID) {
76 // reserveResources - Reserve the resources occupied by a MCInstrDesc and
78 void DFAPacketizer::reserveResources(const llvm::MCInstrDesc *MID) {
92 const llvm::MCInstrDesc &MID = MI->getDesc();
99 const llvm::MCInstrDesc &MID = MI->getDesc();
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| ScoreboardHazardRecognizer.cpp | 128 const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
184 const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
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| TargetInstrInfo.cpp | 39 TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum,
120 const MCInstrDesc &MCID = MI->getDesc();
185 const MCInstrDesc &MCID = MI->getDesc();
220 const MCInstrDesc &MCID = MI->getDesc();
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| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| SIMCCodeEmitter.cpp | 44 bool isSrcOperand(const MCInstrDesc &Desc, unsigned OpNo) const;
74 bool SIMCCodeEmitter::isSrcOperand(const MCInstrDesc &Desc,
131 const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
189 const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
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| R600MCCodeEmitter.cpp | 92 const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
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| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrBuilder.h | 31 const MCInstrDesc &MCID = MI->getDesc();
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCHazardRecognizers.cpp | 27 const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
94 const MCInstrDesc &MCID = TM.getInstrInfo()->get(Opcode);
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| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.h | 106 const MCInstrDesc& AddiuSpImm(int64_t Imm) const;
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| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86IntelInstPrinter.cpp | 36 const MCInstrDesc &Desc = MII.get(MI->getOpcode());
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| /external/llvm/lib/Target/X86/ |
| X86InstrBuilder.h | 152 const MCInstrDesc &MCID = MI->getDesc();
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.cpp | 414 const MCInstrDesc& TID = MI->getDesc();
553 const MCInstrDesc& MCID = PacketMI->getDesc();
772 const MCInstrDesc &desc = QII->get(NewOpcode);
[all...] |
