| /external/llvm/lib/MC/ |
| MCInstrAnalysis.cpp | 16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL)
|
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 28 namespace MCOI {
65 /// Flags - These are flags from the MCOI::OperandFlags enum.
78 bool isLookupPtrRegClass() const {return Flags&(1 <<MCOI::LookupPtrRegClass);}
82 bool isPredicate() const { return Flags & (1 << MCOI::Predicate); }
86 bool isOptionalDef() const { return Flags & (1 << MCOI::OptionalDef); }
152 MCOI::OperandConstraint Constraint) const {
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 568 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
570 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
571 Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1)
575 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
576 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1)
580 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0)
|
| X86MCCodeEmitter.cpp | 679 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
681 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
682 Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1)
686 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
687 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1)
691 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0)
[all...] |
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64MCTargetDesc.cpp | 144 != MCOI::OPERAND_PCREL)
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCTargetDesc.cpp | 252 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL)
|
| /external/llvm/lib/Target/X86/ |
| X86CodeEmitter.cpp | 175 Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1;
[all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| MachineVerifier.cpp | 815 const MCOperandInfo &MCOI = MCID.OpInfo[MONum];
818 else if (!MO->isDef() && !MCOI.isOptionalDef())
823 const MCOperandInfo &MCOI = MCID.OpInfo[MONum];
828 if (MO->isDef() && !MCOI.isOptionalDef())
834 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO);
870 if (-1 == MCID.getOperandConstraint(OtherIdx, MCOI::TIED_TO))
[all...] |
| TargetInstrInfo.cpp | 146 MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) {
151 MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) {
|
| MachineInstr.cpp | 700 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO);
705 if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1)
[all...] |
| RegAllocFast.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMCodeEmitter.cpp | [all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | 465 if ((OpInfo.OperandType == MCOI::OPERAND_MEMORY)
466 || (OpInfo.OperandType == MCOI::OPERAND_UNKNOWN)) {
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGFast.cpp | 259 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
|
| ScheduleDAGSDNodes.cpp | 436 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
[all...] |
| InstrEmitter.cpp | 345 bool isTied = MCID.getOperandConstraint(Idx, MCOI::TIED_TO) != -1;
[all...] |
| ScheduleDAGRRList.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 181 assert(MI->getDesc().getOperandConstraint(0, MCOI::TIED_TO) &&
[all...] |
