/bionic/libc/kernel/arch-mips/asm/ |
asm.h | 61 #define MOVZ(rd, rs, rt) .set push; .set reorder; bnez rt, 9f; move rd, rs; .set pop; 9: 66 #define MOVZ(rd, rs, rt) .set push; .set noreorder; beqzl rt, 9f; move rd, rs; .set pop; 9: 71 #define MOVZ(rd, rs, rt) movz rd, rs, rt
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/development/ndk/platforms/android-9/arch-mips/include/asm/ |
asm.h | 61 #define MOVZ(rd, rs, rt) .set push; .set reorder; bnez rt, 9f; move rd, rs; .set pop; 9: 66 #define MOVZ(rd, rs, rt) .set push; .set noreorder; beqzl rt, 9f; move rd, rs; .set pop; 9: 71 #define MOVZ(rd, rs, rt) movz rd, rs, rt
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/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
asm.h | 61 #define MOVZ(rd, rs, rt) .set push; .set reorder; bnez rt, 9f; move rd, rs; .set pop; 9: 66 #define MOVZ(rd, rs, rt) .set push; .set noreorder; beqzl rt, 9f; move rd, rs; .set pop; 9: 71 #define MOVZ(rd, rs, rt) movz rd, rs, rt
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/prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
asm.h | 61 #define MOVZ(rd, rs, rt) .set push; .set reorder; bnez rt, 9f; move rd, rs; .set pop; 9: 66 #define MOVZ(rd, rs, rt) .set push; .set noreorder; beqzl rt, 9f; move rd, rs; .set pop; 9: 71 #define MOVZ(rd, rs, rt) movz rd, rs, rt
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/prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
asm.h | 61 #define MOVZ(rd, rs, rt) .set push; .set reorder; bnez rt, 9f; move rd, rs; .set pop; 9: 66 #define MOVZ(rd, rs, rt) .set push; .set noreorder; beqzl rt, 9f; move rd, rs; .set pop; 9: 71 #define MOVZ(rd, rs, rt) movz rd, rs, rt
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/prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
asm.h | 61 #define MOVZ(rd, rs, rt) .set push; .set reorder; bnez rt, 9f; move rd, rs; .set pop; 9: 66 #define MOVZ(rd, rs, rt) .set push; .set noreorder; beqzl rt, 9f; move rd, rs; .set pop; 9: 71 #define MOVZ(rd, rs, rt) movz rd, rs, rt
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/prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
asm.h | 61 #define MOVZ(rd, rs, rt) .set push; .set reorder; bnez rt, 9f; move rd, rs; .set pop; 9: 66 #define MOVZ(rd, rs, rt) .set push; .set noreorder; beqzl rt, 9f; move rd, rs; .set pop; 9: 71 #define MOVZ(rd, rs, rt) movz rd, rs, rt
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/external/kernel-headers/original/asm-mips/ |
asm.h | 166 * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs. 176 #define MOVZ(rd, rs, rt) \ 192 #define MOVZ(rd, rs, rt) \ 204 #define MOVZ(rd, rs, rt) \ 205 movz rd, rs, rt
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/external/chromium_org/v8/src/mips/ |
constants-mips.cc | 275 case MOVZ:
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constants-mips.h | 318 MOVZ = ((1 << 3) + 2),
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simulator-mips.cc | [all...] |
assembler-mips.cc | 1579 void Assembler::movz(Register rd, Register rs, Register rt) { function in class:v8::Assembler [all...] |
/external/v8/src/mips/ |
constants-mips.cc | 271 case MOVZ:
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constants-mips.h | 313 MOVZ = ((1 << 3) + 2),
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simulator-mips.cc | [all...] |
assembler-mips.cc | 1572 void Assembler::movz(Register rd, Register rs, Register rt) { function in class:v8::Assembler [all...] |
/system/core/libpixelflinger/codeflinger/ |
MIPSAssembler.h | 351 void MOVZ(int Rd, int Rs, int Rt);
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MIPSAssembler.cpp | [all...] |
/external/valgrind/main/none/tests/mips32/ |
MoveIns.stdout.exp | 305 MOVZ.S 306 movz.s $f0, $f2, $t3 :: fs rt 0x0 307 movz.s $f0, $f2, $t3 :: fs rt 0x0 308 movz.s $f0, $f2, $t3 :: fs rt 0x0 309 movz.s $f0, $f2, $t3 :: fs rt 0x0 310 movz.s $f0, $f2, $t3 :: fs rt 0x0 311 movz.s $f0, $f2, $t3 :: fs rt 0xc0e96d19 312 movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28 313 movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28 314 movz.s $f0, $f2, $t3 :: fs rt 0x [all...] |
MIPS32int.stdout.exp | 379 MOVZ 380 movz $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0x00000000 381 movz $t0, $t1, $t2 :: rd 0x00000000 rs 0x31415927, rt 0x00000001 382 movz $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff 383 movz $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 384 movz $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001 385 movz $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 386 movz $t0, $t1, $t2 :: rd 0x00000000 rs 0x80000000, rt 0xffffffff 387 movz $t0, $t1, $t2 :: rd 0x00000000 rs 0x80000000, rt 0x00000001 388 movz $t0, $t1, $t2 :: rd 0x00000000 rs 0x7fffffff, rt 0x0000000 [all...] |