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    Searched refs:MipsISD (Results 1 - 5 of 5) sorted by null

  /external/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 145 case ISD::SMUL_LOHI: return lowerMulDiv(Op, MipsISD::Mult, true, true, DAG);
146 case ISD::UMUL_LOHI: return lowerMulDiv(Op, MipsISD::Multu, true, true, DAG);
147 case ISD::MULHS: return lowerMulDiv(Op, MipsISD::Mult, false, true, DAG);
148 case ISD::MULHU: return lowerMulDiv(Op, MipsISD::Multu, false, true, DAG);
149 case ISD::MUL: return lowerMulDiv(Op, MipsISD::Mult, true, false, DAG);
150 case ISD::SDIVREM: return lowerMulDiv(Op, MipsISD::DivRem, true, true, DAG);
151 case ISD::UDIVREM: return lowerMulDiv(Op, MipsISD::DivRemU, true, true,
207 SDValue ACCIn = CurDAG->getNode(MipsISD::InsertLOHI, DL, MVT::Untyped,
212 MultOpc = MultOpc == ISD::UMUL_LOHI ? MipsISD::MAddu : MipsISD::MAdd
    [all...]
MipsISelLowering.cpp 108 DAG.getNode(MipsISD::Hi, DL, Ty, Hi),
109 DAG.getNode(MipsISD::Lo, DL, Ty, Lo));
117 SDValue GOT = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty),
123 SDValue Lo = DAG.getNode(MipsISD::Lo, DL, Ty, getTargetNode(Op, DAG, LoFlag));
131 SDValue Tgt = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty),
142 SDValue Hi = DAG.getNode(MipsISD::Hi, DL, Ty, getTargetNode(Op, DAG, HiFlag));
144 SDValue Wrapper = DAG.getNode(MipsISD::Wrapper, DL, Ty, Hi,
152 case MipsISD::JmpLink: return "MipsISD::JmpLink";
153 case MipsISD::TailCall: return "MipsISD::TailCall"
    [all...]
Mips16ISelDAGToDAG.cpp 174 if (Addr.getOpcode() == MipsISD::Wrapper) {
212 if (Addr.getOperand(1).getOpcode() == MipsISD::Lo ||
213 Addr.getOperand(1).getOpcode() == MipsISD::GPRel) {
MipsSEISelDAGToDAG.cpp 250 if (Addr.getOpcode() == MipsISD::Wrapper) {
289 if (Addr.getOperand(1).getOpcode() == MipsISD::Lo ||
290 Addr.getOperand(1).getOpcode() == MipsISD::GPRel) {
404 case MipsISD::ThreadPointer: {
429 case MipsISD::InsertLOHI: {
MipsISelLowering.h 28 namespace MipsISD {

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