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Searched
refs:Op5
(Results
1 - 3
of
3
) sorted by null
/external/llvm/lib/Target/XCore/Disassembler/
XCoreDisassembler.cpp
659
unsigned Op1, Op2, Op3, Op4,
Op5
, Op6;
664
S = Decode3OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4,
Op5
, Op6);
671
DecodeGRRegsRegisterClass(Inst,
Op5
, Address, Decoder);
693
unsigned Op1, Op2, Op3, Op4,
Op5
;
698
S = Decode2OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4,
Op5
);
706
DecodeGRRegsRegisterClass(Inst,
Op5
, Address, Decoder);
/external/llvm/include/llvm/CodeGen/
SelectionDAG.h
[
all
...]
/external/llvm/lib/CodeGen/SelectionDAG/
SelectionDAG.cpp
[
all
...]
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