| /external/chromium_org/third_party/skia/include/core/ |
| SkChecksum.h | 29 ROTR = 17,
30 ROTL = sizeof(uintptr_t) * 8 - ROTR,
35 return ((total >> ROTR) | (total << ROTL)) ^ value;
|
| /external/skia/include/core/ |
| SkChecksum.h | 29 ROTR = 17,
30 ROTL = sizeof(uintptr_t) * 8 - ROTR,
35 return ((total >> ROTR) | (total << ROTL)) ^ value;
|
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 29 case ISD::ROTR: return ARM_AM::ror;
30 //case ISD::ROTL: // Only if imm -> turn into ROTR.
|
| /external/chromium_org/third_party/openssl/openssl/crypto/sha/ |
| sha512.c | 309 # define ROTR(a,n) ({ SHA_LONG64 ret; \
339 # define ROTR(a,n) ({ SHA_LONG64 ret; \
347 # define ROTR(a,n) _rotr64((a),n)
382 #ifndef ROTR
383 #define ROTR(x,s) (((x)>>s) | (x)<<(64-s))
386 #define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
387 #define Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41)
[all...] |
| /external/openssl/crypto/sha/ |
| sha512.c | 309 # define ROTR(a,n) ({ SHA_LONG64 ret; \
339 # define ROTR(a,n) ({ SHA_LONG64 ret; \
347 # define ROTR(a,n) _rotr64((a),n)
382 #ifndef ROTR
383 #define ROTR(x,s) (((x)>>s) | (x)<<(64-s))
386 #define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
387 #define Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41)
[all...] |
| /external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/ |
| sha512-armv4.pl | 75 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
130 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
305 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
322 @ sigma1(x) (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6)
[all...] |
| sha512-armv4.S | 131 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
186 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
225 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
242 @ sigma1(x) (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6)
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha512-armv4.pl | 75 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
130 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
305 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
322 @ sigma1(x) (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6)
[all...] |
| sha512-armv4.S | 131 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
186 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
225 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
242 @ sigma1(x) (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6)
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 306 SHL, SRA, SRL, ROTL, ROTR,
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| MIPSAssembler.cpp | 401 mMips->ROTR(tmpReg, amode.reg, amode.value);
512 mMips->ROTR(Rd, amode.reg, amode.value);
544 mMips->ROTR(Rd, amode.reg, amode.value);
[all...] |
| MIPSAssembler.h | 319 void ROTR(int Rd, int Rt, int shft); // mips32r2
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 151 setOperationAction(ISD::ROTR, MVT::i64, Legal);
154 setOperationAction(ISD::ROTR, MVT::i64, Expand);
158 setOperationAction(ISD::ROTR, MVT::i32, Legal);
161 setOperationAction(ISD::ROTR, MVT::i32, Expand);
165 setOperationAction(ISD::ROTR, MVT::i16, Expand);
167 setOperationAction(ISD::ROTR, MVT::i8, Expand);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 172 case ISD::ROTR: return "rotr";
|
| LegalizeVectorOps.cpp | 212 case ISD::ROTR:
|
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 102 setOperationAction(ISD::ROTR, MVT::i8, Expand);
104 setOperationAction(ISD::ROTR, MVT::i16, Expand);
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 151 // GPU doesn't have a rotl, rotr, or byteswap instruction
152 setOperationAction(ISD::ROTR, VT, Expand);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 151 // GPU doesn't have a rotl, rotr, or byteswap instruction
152 setOperationAction(ISD::ROTR, VT, Expand);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 113 setOperationAction(ISD::ROTR , MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 321 setOperationAction(ISD::ROTR, MVT::i32, Expand);
324 setOperationAction(ISD::ROTR, MVT::i64, Expand);
[all...] |
