/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 705 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used. [all...] |
/external/llvm/lib/CodeGen/ |
Analysis.cpp | 165 case FCmpInst::FCMP_ULE: return ISD::SETULE; 177 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; 192 case ICmpInst::ICMP_ULE: return ISD::SETULE;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
TargetLowering.cpp | 171 case ISD::SETULE: [all...] |
SelectionDAGDumper.cpp | 298 case ISD::SETULE: return "setule";
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LegalizeIntegerTypes.cpp | [all...] |
SelectionDAG.cpp | 261 case ISD::SETULE: 310 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE [all...] |
SelectionDAGBuilder.cpp | [all...] |
LegalizeDAG.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelDAGToDAG.cpp | 583 case ISD::SETULE: 613 case ISD::SETULE: 614 case ISD::SETLE: Invert = true; return 1; // !Bit #1 = SETULE 664 case ISD::SETULE: 837 case ISD::SETULE: { [all...] |
PPCISelLowering.cpp | 494 setCondCodeAction(ISD::SETULE, MVT::v4f32, Expand); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/R600/ |
AMDGPUISelLowering.cpp | 310 case ISD::SETULE:
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AMDILISelLowering.cpp | 127 setOperationAction(ISD::SETULE, VT, Expand);
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R600ISelLowering.cpp | 886 case ISD::SETULE: [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
AMDILISelLowering.cpp | 138 setOperationAction(ISD::SETULE, VT, Expand);
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/external/llvm/lib/Target/Mips/ |
MipsSEISelLowering.cpp | 455 case ISD::SETULE:
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MipsISelLowering.cpp | 472 case ISD::SETULE: return Mips::FCOND_ULE; [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
AMDILISelLowering.cpp | 138 setOperationAction(ISD::SETULE, VT, Expand);
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/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 723 case ISD::SETULE: [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |