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Searched
refs:SPR
(Results
1 - 5
of
5
) sorted by null
/external/llvm/lib/Target/PowerPC/
PPCJITInfo.cpp
36
#define BUILD_MTSPR(RS,
SPR
) \
37
((31 << 26) | ((RS) << 21) | ((
SPR
) << 16) | (467 << 1))
/external/qemu/tcg/ppc/
tcg-target.c
384
#define
SPR
(a,b) ((((a)<<5)|(b))<<11)
385
#define LR
SPR
(8, 0)
386
#define CTR
SPR
(9, 0)
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all
...]
/external/qemu/tcg/ppc64/
tcg-target.c
376
#define
SPR
(a,b) ((((a)<<5)|(b))<<11)
377
#define LR
SPR
(8, 0)
378
#define CTR
SPR
(9, 0)
[
all
...]
/external/valgrind/main/VEX/priv/
guest_ppc_toIR.c
[
all
...]
/external/qemu/
ppc-dis.c
778
/* The
SPR
field in an XFX form instruction. This is flipped--the
780
#define
SPR
SISIGNOPT + 1
781
#define PMR
SPR
786
#define SPRBAT
SPR
+ 1
806
/* The TBR field in an XFX form instruction. This is like the
SPR
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