HomeSort by relevance Sort by last modified time
    Searched refs:TRI (Results 1 - 25 of 210) sorted by null

1 2 3 4 5 6 7 8 9

  /external/llvm/lib/CodeGen/
RegisterClassInfo.cpp 32 RegisterClassInfo::RegisterClassInfo() : Tag(0), MF(0), TRI(0), CalleeSaved(0)
40 if (MF->getTarget().getRegisterInfo() != TRI) {
41 TRI = MF->getTarget().getRegisterInfo();
42 RegClass.reset(new RCInfo[TRI->getNumRegClasses()]);
43 unsigned NumPSets = TRI->getNumRegPressureSets();
50 const MCPhysReg *CSR = TRI->getCalleeSavedRegs(MF);
55 CSRNum.resize(TRI->getNumRegs(), 0);
57 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
101 unsigned Cost = TRI->getCostPerUse(PhysReg);
120 unsigned Cost = TRI->getCostPerUse(PhysReg)
    [all...]
LiveRegMatrix.cpp 50 TRI = MF.getTarget().getRegisterInfo();
55 unsigned NumRegUnits = TRI->getNumRegUnits();
73 DEBUG(dbgs() << "assigning " << PrintReg(VirtReg.reg, TRI)
74 << " to " << PrintReg(PhysReg, TRI) << ':');
78 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
79 DEBUG(dbgs() << ' ' << PrintRegUnit(*Units, TRI));
88 DEBUG(dbgs() << "unassigning " << PrintReg(VirtReg.reg, TRI)
89 << " from " << PrintReg(PhysReg, TRI) << ':');
91 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
92 DEBUG(dbgs() << ' ' << PrintRegUnit(*Units, TRI));
    [all...]
AllocationOrder.cpp 34 const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo();
36 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM);
43 dbgs() << ' ' << PrintReg(Hints[I], TRI);
RegisterCoalescer.h 29 const TargetRegisterInfo &TRI;
62 CoalescerPair(const TargetRegisterInfo &tri)
63 : TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0),
69 const TargetRegisterInfo &tri)
70 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0),
RegAllocBase.h 61 const TargetRegisterInfo *TRI;
68 RegAllocBase(): TRI(0), MRI(0), VRM(0), LIS(0), Matrix(0) {}
TargetRegisterInfo.cpp 43 else if (TRI && Reg < TRI->getNumRegs())
44 OS << '%' << TRI->getName(Reg);
48 if (TRI)
49 OS << ':' << TRI->getSubRegIndexName(SubIdx);
56 // Generic printout when TRI is missing.
57 if (!TRI) {
63 if (Unit >= TRI->getNumRegUnits()) {
69 MCRegUnitRootIterator Roots(Unit, TRI);
71 OS << TRI->getName(*Roots)
    [all...]
MachineCopyPropagation.cpp 35 const TargetRegisterInfo *TRI;
68 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
77 for (MCSubRegIterator SR(MappedDef, TRI); SR.isValid(); ++SR)
114 const TargetRegisterInfo *TRI) {
118 if (TRI->isSubRegister(SrcSrc, Def)) {
120 unsigned SubIdx = TRI->getSubRegIndex(SrcSrc, Def);
123 return SubIdx == TRI->getSubRegIndex(SrcDef, Src);
164 isNopCopy(CopyMI, Def, Src, TRI)) {
182 I->clearRegisterKills(Def, TRI);
192 for (MCRegAliasIterator AI(Src, TRI, true); AI.isValid(); ++AI)
    [all...]
InterferenceCache.h 25 const TargetRegisterInfo *TRI;
112 void revalidate(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
115 bool valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
120 const TargetRegisterInfo *TRI,
150 InterferenceCache() : TRI(0), LIUArray(0), MF(0), RoundRobin(0) {}
RegisterScavenging.cpp 34 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
40 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
74 TRI = TM.getRegisterInfo();
77 assert((NumPhysRegs == 0 || NumPhysRegs == TRI->getNumRegs()) &&
87 NumPhysRegs = TRI->getNumRegs();
94 const uint16_t *CSRegs = TRI->getCalleeSavedRegs(&MF);
107 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
220 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
237 isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) &&
262 DEBUG(dbgs() << "Scavenger found unused reg: " << TRI->getName(*I) <
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
R600ExpandSpecialInstrs.cpp 53 const R600RegisterInfo &TRI = TII->getRegisterInfo();
105 unsigned SubRegIndex = TRI.getSubRegFromChannel(Chan);
106 Src0 = TRI.getSubReg(Src0, SubRegIndex);
107 Src1 = TRI.getSubReg(Src1, SubRegIndex);
110 unsigned SubRegIndex0 = TRI.getSubRegFromChannel(CubeSrcSwz[Chan]);
111 unsigned SubRegIndex1 = TRI.getSubRegFromChannel(CubeSrcSwz[3 - Chan]);
112 Src1 = TRI.getSubReg(Src0, SubRegIndex1);
113 Src0 = TRI.getSubReg(Src0, SubRegIndex0);
119 unsigned SubRegIndex = TRI.getSubRegFromChannel(Chan);
120 DstReg = TRI.getSubReg(DstReg, SubRegIndex)
    [all...]
  /external/mesa3d/src/gallium/drivers/radeon/
R600ExpandSpecialInstrs.cpp 53 const R600RegisterInfo &TRI = TII->getRegisterInfo();
105 unsigned SubRegIndex = TRI.getSubRegFromChannel(Chan);
106 Src0 = TRI.getSubReg(Src0, SubRegIndex);
107 Src1 = TRI.getSubReg(Src1, SubRegIndex);
110 unsigned SubRegIndex0 = TRI.getSubRegFromChannel(CubeSrcSwz[Chan]);
111 unsigned SubRegIndex1 = TRI.getSubRegFromChannel(CubeSrcSwz[3 - Chan]);
112 Src1 = TRI.getSubReg(Src0, SubRegIndex1);
113 Src0 = TRI.getSubReg(Src0, SubRegIndex0);
119 unsigned SubRegIndex = TRI.getSubRegFromChannel(Chan);
120 DstReg = TRI.getSubReg(DstReg, SubRegIndex)
    [all...]
  /external/llvm/lib/Target/R600/
SIFixSGPRCopies.cpp 82 const TargetRegisterClass *inferRegClass(const TargetRegisterInfo *TRI,
109 const TargetRegisterInfo *TRI,
122 RC = TRI->getCommonSubClass(RC, inferRegClass(TRI, MRI,
133 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
145 const TargetRegisterClass *RC = inferRegClass(TRI, MRI, Reg);
R600ExpandSpecialInstrs.cpp 61 const R600RegisterInfo &TRI = TII->getRegisterInfo();
152 const R600RegisterInfo &TRI = TII->getRegisterInfo();
160 TRI.getSubReg(DstReg, TRI.getSubRegFromChannel(Chan)), PReg);
173 const R600RegisterInfo &TRI = TII->getRegisterInfo();
176 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK;
179 bool Mask = (Chan != TRI.getHWRegChan(DstReg));
203 if ((TRI.getEncodingValue(Src0) & 0xff) < 127 &&
204 (TRI.getEncodingValue(Src1) & 0xff) < 127)
205 assert(TRI.getHWRegChan(Src0) == TRI.getHWRegChan(Src1))
    [all...]
  /external/llvm/lib/Target/ARM/
Thumb1FrameLowering.h 41 const TargetRegisterInfo *TRI) const;
45 const TargetRegisterInfo *TRI) const;
Thumb1InstrInfo.h 50 const TargetRegisterInfo *TRI) const;
56 const TargetRegisterInfo *TRI) const;
Thumb2InstrInfo.h 52 const TargetRegisterInfo *TRI) const;
58 const TargetRegisterInfo *TRI) const;
  /external/llvm/lib/Target/Mips/
MipsInstrInfo.h 89 const TargetRegisterInfo *TRI) const {
90 storeRegToStack(MBB, MBBI, SrcReg, isKill, FrameIndex, RC, TRI, 0);
97 const TargetRegisterInfo *TRI) const {
98 loadRegFromStack(MBB, MBBI, DestReg, FrameIndex, RC, TRI, 0);
105 const TargetRegisterInfo *TRI,
112 const TargetRegisterInfo *TRI,
Mips16FrameLowering.h 37 const TargetRegisterInfo *TRI) const;
42 const TargetRegisterInfo *TRI) const;
MipsFrameLowering.cpp 104 const TargetRegisterInfo &TRI = *MF.getTarget().getRegisterInfo();
113 for (const uint16_t *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) {
114 unsigned Size = TRI.getMinimalPhysRegClass(*R)->getSize();
  /external/llvm/lib/Target/AArch64/
AArch64AsmPrinter.cpp 34 const TargetRegisterInfo *TRI,
40 for (MCRegAliasIterator AR(MO.getReg(), TRI, true); AR.isValid(); ++AR) {
52 const TargetRegisterInfo *TRI,
66 for (MCRegAliasIterator AR(MO.getReg(), TRI, true); AR.isValid(); ++AR) {
147 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
160 if (printModifiedFPRAsmOperand(MO, TRI, AArch64::VPR128RegClass, O))
192 return printModifiedGPRAsmOperand(MI->getOperand(OpNum), TRI,
197 return printModifiedGPRAsmOperand(MI->getOperand(OpNum), TRI,
215 return printModifiedFPRAsmOperand(MI->getOperand(OpNum), TRI,
219 return printModifiedFPRAsmOperand(MI->getOperand(OpNum), TRI,
    [all...]
AArch64FrameLowering.h 68 const TargetRegisterInfo *TRI) const;
72 const TargetRegisterInfo *TRI) const;
92 const TargetRegisterInfo *TRI,
  /external/llvm/lib/Target/Hexagon/
HexagonFrameLowering.h 37 const TargetRegisterInfo *TRI) const;
47 const TargetRegisterInfo *TRI) const;
HexagonFrameLowering.cpp 212 unsigned uniqueSuperReg(unsigned Reg, const TargetRegisterInfo *TRI) {
213 MCSuperRegIterator SRI(Reg, TRI);
226 const TargetRegisterInfo *TRI) const {
247 unsigned SuperReg = uniqueSuperReg(Reg, TRI);
252 unsigned SuperRegNext = uniqueSuperReg(CSI[i+1].getReg(), TRI);
253 SuperRegClass = TRI->getMinimalPhysRegClass(SuperReg);
260 CSI[i+1].getFrameIdx(), SuperRegClass, TRI);
266 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
268 TRI);
280 const TargetRegisterInfo *TRI) const
    [all...]
  /external/llvm/lib/Target/MSP430/
MSP430FrameLowering.h 45 const TargetRegisterInfo *TRI) const;
49 const TargetRegisterInfo *TRI) const;
  /external/llvm/lib/Target/XCore/
XCoreFrameLowering.h 36 const TargetRegisterInfo *TRI) const;
40 const TargetRegisterInfo *TRI) const;

Completed in 198 milliseconds

1 2 3 4 5 6 7 8 9