| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 178 /// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
181 SMUL_LOHI, UMUL_LOHI,
[all...] |
| SelectionDAG.h | [all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 289 case ISD::UMUL_LOHI: {
290 MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::MultuRxRy16 : Mips::MultRxRy16);
|
| MipsSEISelLowering.cpp | 93 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custom);
146 case ISD::UMUL_LOHI: return lowerMulDiv(Op, MipsISD::Multu, true, true, DAG);
186 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI)
212 MultOpc = MultOpc == ISD::UMUL_LOHI ? MipsISD::MAddu : MipsISD::MAdd;
262 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI)
288 MultOpc = MultOpc == ISD::UMUL_LOHI ? MipsISD::MSubu : MipsISD::MSub;
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 121 setOperationAction(ISD::UMUL_LOHI, VT, Expand);
149 setOperationAction(ISD::UMUL_LOHI, VT, Expand);
|
| /external/llvm/lib/Target/R600/ |
| AMDILISelLowering.cpp | 110 setOperationAction(ISD::UMUL_LOHI, VT, Expand);
138 setOperationAction(ISD::UMUL_LOHI, VT, Expand);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 121 setOperationAction(ISD::UMUL_LOHI, VT, Expand);
149 setOperationAction(ISD::UMUL_LOHI, VT, Expand);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 162 case ISD::UMUL_LOHI: return "umul_lohi";
|
| TargetLowering.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 103 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custom);
183 case ISD::UMUL_LOHI: return LowerUMUL_LOHI(Op, DAG);
534 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::UMUL_LOHI &&
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 147 setOperationAction(ISD::UMUL_LOHI, MVT::i8, Expand);
152 setOperationAction(ISD::UMUL_LOHI, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 168 // The architecture has 32-bit SMUL_LOHI and UMUL_LOHI (MR and MLR),
170 // but there is a 64-bit UMUL_LOHI: MLGR.
173 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
174 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Custom);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 115 // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM.
116 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
118 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);
420 setOperationAction(ISD::UMUL_LOHI, VT, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 652 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
