/external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
i915_fpc_optimize.c | 121 * of writemask which are set, swizzle to identity otherwise. 165 o->WriteMask = i->WriteMask; 210 is_unswizzled(¤t->FullInstruction.Src[0], current->FullInstruction.Dst[0].Register.WriteMask) && 211 is_unswizzled(¤t->FullInstruction.Src[1], current->FullInstruction.Dst[0].Register.WriteMask) && 212 is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) ) 218 next->FullInstruction.Dst[0].Register.WriteMask, 221 current->FullInstruction.Dst[0].Register.WriteMask = current->FullInstruction.Dst[0].Register.WriteMask | 222 next->FullInstruction.Dst[0].Register.WriteMask; [all...] |
/external/mesa3d/src/gallium/drivers/i915/ |
i915_fpc_optimize.c | 121 * of writemask which are set, swizzle to identity otherwise. 165 o->WriteMask = i->WriteMask; 210 is_unswizzled(¤t->FullInstruction.Src[0], current->FullInstruction.Dst[0].Register.WriteMask) && 211 is_unswizzled(¤t->FullInstruction.Src[1], current->FullInstruction.Dst[0].Register.WriteMask) && 212 is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) ) 218 next->FullInstruction.Dst[0].Register.WriteMask, 221 current->FullInstruction.Dst[0].Register.WriteMask = current->FullInstruction.Dst[0].Register.WriteMask | 222 next->FullInstruction.Dst[0].Register.WriteMask; [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/tests/ |
rc_test_helpers.c | 203 struct match_info WriteMask; 236 tokens.WriteMask.String = dst_str + matches[3].rm_so; 237 tokens.WriteMask.Length = match_length(matches, 3); 258 /* WriteMask */ 259 if (tokens.WriteMask.Length == 0) { 260 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; 263 if (tokens.WriteMask.String[0] != '.') { 264 fprintf(stderr, "1st char of writemask is not valid.\n"); 267 for (i = 1; i < tokens.WriteMask.Length; i++) { 268 switch(tokens.WriteMask.String[i]) [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
rc_test_helpers.c | 203 struct match_info WriteMask; 236 tokens.WriteMask.String = dst_str + matches[3].rm_so; 237 tokens.WriteMask.Length = match_length(matches, 3); 258 /* WriteMask */ 259 if (tokens.WriteMask.Length == 0) { 260 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; 263 if (tokens.WriteMask.String[0] != '.') { 264 fprintf(stderr, "1st char of writemask is not valid.\n"); 267 for (i = 1; i < tokens.WriteMask.Length; i++) { 268 switch(tokens.WriteMask.String[i]) [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
gen6_depthstencil.c | 60 ds->ds1.stencil_write_mask = ctx->Stencil.WriteMask[0]; 73 ds->ds1.bf_stencil_write_mask = ctx->Stencil.WriteMask[back]; 79 if (ctx->Stencil.WriteMask[0] || 80 (ctx->Stencil._TestTwoSide && ctx->Stencil.WriteMask[back]))
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brw_cc.c | 120 cc->cc1.stencil_write_mask = ctx->Stencil.WriteMask[0]; 134 cc->cc2.bf_stencil_write_mask = ctx->Stencil.WriteMask[back]; 140 if (ctx->Stencil.WriteMask[0] || 141 (ctx->Stencil._TestTwoSide && ctx->Stencil.WriteMask[back]))
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
gen6_depthstencil.c | 60 ds->ds1.stencil_write_mask = ctx->Stencil.WriteMask[0]; 73 ds->ds1.bf_stencil_write_mask = ctx->Stencil.WriteMask[back]; 79 if (ctx->Stencil.WriteMask[0] || 80 (ctx->Stencil._TestTwoSide && ctx->Stencil.WriteMask[back]))
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
radeon_pair_translate.c | 90 *needrgb = (inst->DstReg.WriteMask & RC_MASK_XYZ) ? 1 : 0; 91 *needalpha = (inst->DstReg.WriteMask & RC_MASK_W) ? 1 : 0; 275 inst->DstReg.WriteMask); 286 pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3); 293 inst->DstReg.WriteMask & RC_MASK_XYZ; 295 GET_BIT(inst->DstReg.WriteMask, 3); 303 pair->RGB.WriteMask |= inst->DstReg.WriteMask & RC_MASK_XYZ; 307 pair->Alpha.WriteMask |= (GET_BIT(inst->DstReg.WriteMask, 3) << 3) [all...] |
r3xx_fragprog.c | 64 if (inst->DstReg.WriteMask & RC_MASK_Z) { 65 inst->DstReg.WriteMask = RC_MASK_W; 67 inst->DstReg.WriteMask = 0;
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radeon_dataflow_deadcode.c | 41 unsigned char WriteMask:4; 162 usedmask = *pused & inst->U.I.DstReg.WriteMask; 167 insts->WriteMask |= usedmask; 257 ptr->U.I.DstReg.WriteMask, srcmasks); 324 inst->U.I.DstReg.WriteMask = s.Instructions[ip].WriteMask; 325 if (s.Instructions[ip].WriteMask) 341 usemask = s.Instructions[ip].WriteMask;
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radeon_variable.c | 38 * Rewrite the index and writemask for the destination register of var 60 if (var_ptr->Dst.WriteMask == RC_MASK_W) { 156 unsigned int mask = var->Readers[i].WriteMask; 285 new->Dst.WriteMask = DstWriteMask; 320 unsigned int writemask; local 332 if (sub_inst->WriteMask) { 334 writemask = sub_inst->WriteMask; 337 writemask = sub_inst->OutputWriteMask; 339 writemask = 0 392 unsigned int writemask = 0; local [all...] |
radeon_program_tex.c | 92 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W; 173 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; 183 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W; 194 inst_mul->U.I.DstReg.WriteMask = RC_MASK_W; 210 inst_add->U.I.DstReg.WriteMask = RC_MASK_W; 311 inst_frc->U.I.DstReg.WriteMask = RC_MASK_XYZ; 333 inst_mul->U.I.DstReg.WriteMask = RC_MASK_XYZ; 342 inst_frc->U.I.DstReg.WriteMask = RC_MASK_XYZ; 353 inst_mad->U.I.DstReg.WriteMask = RC_MASK_XYZ; 368 inst_add->U.I.DstReg.WriteMask = RC_MASK_XYZ [all...] |
radeon_program.h | 60 unsigned int WriteMask:4;
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radeon_program_pair.h | 74 unsigned int WriteMask:4;
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
radeon_pair_translate.c | 90 *needrgb = (inst->DstReg.WriteMask & RC_MASK_XYZ) ? 1 : 0; 91 *needalpha = (inst->DstReg.WriteMask & RC_MASK_W) ? 1 : 0; 275 inst->DstReg.WriteMask); 286 pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3); 293 inst->DstReg.WriteMask & RC_MASK_XYZ; 295 GET_BIT(inst->DstReg.WriteMask, 3); 303 pair->RGB.WriteMask |= inst->DstReg.WriteMask & RC_MASK_XYZ; 307 pair->Alpha.WriteMask |= (GET_BIT(inst->DstReg.WriteMask, 3) << 3) [all...] |
r3xx_fragprog.c | 64 if (inst->DstReg.WriteMask & RC_MASK_Z) { 65 inst->DstReg.WriteMask = RC_MASK_W; 67 inst->DstReg.WriteMask = 0;
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radeon_dataflow_deadcode.c | 41 unsigned char WriteMask:4; 162 usedmask = *pused & inst->U.I.DstReg.WriteMask; 167 insts->WriteMask |= usedmask; 257 ptr->U.I.DstReg.WriteMask, srcmasks); 324 inst->U.I.DstReg.WriteMask = s.Instructions[ip].WriteMask; 325 if (s.Instructions[ip].WriteMask) 341 usemask = s.Instructions[ip].WriteMask;
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radeon_variable.c | 38 * Rewrite the index and writemask for the destination register of var 60 if (var_ptr->Dst.WriteMask == RC_MASK_W) { 156 unsigned int mask = var->Readers[i].WriteMask; 285 new->Dst.WriteMask = DstWriteMask; 320 unsigned int writemask; local 332 if (sub_inst->WriteMask) { 334 writemask = sub_inst->WriteMask; 337 writemask = sub_inst->OutputWriteMask; 339 writemask = 0 392 unsigned int writemask = 0; local [all...] |
radeon_program_tex.c | 92 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W; 173 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; 183 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W; 194 inst_mul->U.I.DstReg.WriteMask = RC_MASK_W; 210 inst_add->U.I.DstReg.WriteMask = RC_MASK_W; 311 inst_frc->U.I.DstReg.WriteMask = RC_MASK_XYZ; 333 inst_mul->U.I.DstReg.WriteMask = RC_MASK_XYZ; 342 inst_frc->U.I.DstReg.WriteMask = RC_MASK_XYZ; 353 inst_mad->U.I.DstReg.WriteMask = RC_MASK_XYZ; 368 inst_add->U.I.DstReg.WriteMask = RC_MASK_XYZ [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/program/ |
prog_instruction.c | 54 inst[i].DstReg.WriteMask = WRITEMASK_XYZW; 307 if (inst->DstReg.WriteMask == WRITEMASK_X || 308 inst->DstReg.WriteMask == WRITEMASK_Y || 309 inst->DstReg.WriteMask == WRITEMASK_Z || 310 inst->DstReg.WriteMask == WRITEMASK_W || 311 inst->DstReg.WriteMask == 0x0) { 323 if (inst->DstReg.WriteMask & (1 << chan)) {
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prog_optimize.c | 88 channel_mask = inst->DstReg.WriteMask & dst_mask; 134 const GLuint mask = mov->DstReg.WriteMask; 331 inst->DstReg.WriteMask & (1 << chan)) { 333 printf("Remove writemask on %u.%c\n", i, 336 inst->DstReg.WriteMask &= ~(1 << chan); 341 if (inst->DstReg.WriteMask == 0) { 421 mask &= ~inst->DstReg.WriteMask; 523 dst_mask = mov->DstReg.WriteMask; 573 dst_mask &= ~inst2->DstReg.WriteMask; 581 src_mask &= ~inst2->DstReg.WriteMask; [all...] |
/external/mesa3d/src/mesa/program/ |
prog_instruction.c | 54 inst[i].DstReg.WriteMask = WRITEMASK_XYZW; 307 if (inst->DstReg.WriteMask == WRITEMASK_X || 308 inst->DstReg.WriteMask == WRITEMASK_Y || 309 inst->DstReg.WriteMask == WRITEMASK_Z || 310 inst->DstReg.WriteMask == WRITEMASK_W || 311 inst->DstReg.WriteMask == 0x0) { 323 if (inst->DstReg.WriteMask & (1 << chan)) {
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prog_optimize.c | 88 channel_mask = inst->DstReg.WriteMask & dst_mask; 134 const GLuint mask = mov->DstReg.WriteMask; 331 inst->DstReg.WriteMask & (1 << chan)) { 333 printf("Remove writemask on %u.%c\n", i, 336 inst->DstReg.WriteMask &= ~(1 << chan); 341 if (inst->DstReg.WriteMask == 0) { 421 mask &= ~inst->DstReg.WriteMask; 523 dst_mask = mov->DstReg.WriteMask; 573 dst_mask &= ~inst2->DstReg.WriteMask; 581 src_mask &= ~inst2->DstReg.WriteMask; [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/main/ |
stencil.c | 259 * Updates gl_stencil_attrib::WriteMask. On change flushes the vertices and 276 if (ctx->Stencil.WriteMask[face] == mask) 279 ctx->Stencil.WriteMask[face] = mask; 290 if (ctx->Stencil.WriteMask[0] == mask && 291 ctx->Stencil.WriteMask[1] == mask) 294 ctx->Stencil.WriteMask[0] = ctx->Stencil.WriteMask[1] = mask; 536 ctx->Stencil.WriteMask[0] = mask; 539 ctx->Stencil.WriteMask[1] = mask; 566 ctx->Stencil.WriteMask[0] != ctx->Stencil.WriteMask[face]) [all...] |
/external/mesa3d/src/mesa/main/ |
stencil.c | 259 * Updates gl_stencil_attrib::WriteMask. On change flushes the vertices and 276 if (ctx->Stencil.WriteMask[face] == mask) 279 ctx->Stencil.WriteMask[face] = mask; 290 if (ctx->Stencil.WriteMask[0] == mask && 291 ctx->Stencil.WriteMask[1] == mask) 294 ctx->Stencil.WriteMask[0] = ctx->Stencil.WriteMask[1] = mask; 536 ctx->Stencil.WriteMask[0] = mask; 539 ctx->Stencil.WriteMask[1] = mask; 566 ctx->Stencil.WriteMask[0] != ctx->Stencil.WriteMask[face]) [all...] |