/external/qemu/ |
softmmu_defs.h | 4 uint8_t REGPARM __ldb_mmu(target_ulong addr, int mmu_idx); 5 void REGPARM __stb_mmu(target_ulong addr, uint8_t val, int mmu_idx); 6 uint16_t REGPARM __ldw_mmu(target_ulong addr, int mmu_idx); 7 void REGPARM __stw_mmu(target_ulong addr, uint16_t val, int mmu_idx); 8 uint32_t REGPARM __ldl_mmu(target_ulong addr, int mmu_idx); 9 void REGPARM __stl_mmu(target_ulong addr, uint32_t val, int mmu_idx); 10 uint64_t REGPARM __ldq_mmu(target_ulong addr, int mmu_idx); 11 void REGPARM __stq_mmu(target_ulong addr, uint64_t val, int mmu_idx); 13 uint8_t REGPARM __ldb_cmmu(target_ulong addr, int mmu_idx); 14 void REGPARM __stb_cmmu(target_ulong addr, uint8_t val, int mmu_idx); [all...] |
softmmu_outside_jit.h | 35 uint8_t REGPARM __ldb_outside_jit(target_ulong addr, int mmu_idx); 36 void REGPARM __stb_outside_jit(target_ulong addr, uint8_t val, int mmu_idx); 37 uint16_t REGPARM __ldw_outside_jit(target_ulong addr, int mmu_idx); 38 void REGPARM __stw_outside_jit(target_ulong addr, uint16_t val, int mmu_idx); 39 uint32_t REGPARM __ldl_outside_jit(target_ulong addr, int mmu_idx); 40 void REGPARM __stl_outside_jit(target_ulong addr, uint32_t val, int mmu_idx); 41 uint64_t REGPARM __ldq_outside_jit(target_ulong addr, int mmu_idx); 42 void REGPARM __stq_outside_jit(target_ulong addr, uint64_t val, int mmu_idx);
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softmmu_template.h | 66 int mmu_idx, 99 int mmu_idx) 115 tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; 122 ioaddr = env->iotlb[mmu_idx][index]; 128 * mmu_idx is set to 1. */ 129 if (memcheck_instrument_mmu && mmu_idx == 1 && 140 do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); 143 mmu_idx, retaddr); 147 * mmu_idx is set to 1. */ 148 if (memcheck_instrument_mmu && mmu_idx == 1) [all...] |
softmmu_header.h | 88 int mmu_idx; local 92 mmu_idx = CPU_MMU_INDEX; 93 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != 95 res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); 97 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; 109 int mmu_idx; local 113 mmu_idx = CPU_MMU_INDEX; 114 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != 116 res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); 118 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend 134 int mmu_idx; local [all...] |
exec-all.h | 95 int mmu_idx, int is_softmmu); 98 int mmu_idx, int is_softmmu) 102 return tlb_set_page_exec(env1, vaddr, paddr, prot, mmu_idx, is_softmmu); 353 void tlb_fill(target_ulong addr, int is_write, int mmu_idx, 391 int mmu_idx, page_index, pd; local 395 mmu_idx = cpu_mmu_index(env1); 396 if (unlikely(env1->tlb_table[mmu_idx][page_index].addr_code != 400 pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK; 409 + env1->tlb_table[mmu_idx][page_index].addend;
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exec.c | 1800 int mmu_idx; local 1835 int mmu_idx; local 1908 int mmu_idx; local 1960 int mmu_idx; local 1978 int mmu_idx; local [all...] |
/external/qemu/target-mips/ |
helper.c | 344 int mmu_idx, int is_softmmu) 424 mmu_idx, is_softmmu); 439 int mmu_idx, int is_softmmu) 452 qemu_log("%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d mmu_idx %d smmu %d\n", 453 __func__, env->active_tc.PC, address, rw, mmu_idx, is_softmmu); 471 mmu_idx, is_softmmu); 474 ret = cpu_mips_tlb_refill(env,address,rw,mmu_idx,is_softmmu);
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cpu.h | 422 the bits as the value of mmu_idx. */ 629 int mmu_idx, int is_softmmu);
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op_helper.c | [all...] |
/external/qemu/target-arm/ |
op_helper.c | 73 void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) 84 ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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cpu.h | 255 int mmu_idx, int is_softmuu);
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helper.c | 582 int mmu_idx, int is_softmmu) [all...] |
/external/qemu/target-i386/ |
helper.c | [all...] |
cpu.h | 802 int is_write, int mmu_idx, int is_softmmu);
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op_helper.c | [all...] |