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Searched
refs:prog_data
(Results
1 - 25
of
108
) sorted by null
1
2
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5
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
gen7_wm_state.c
68
dw1 |= brw->wm.
prog_data
->barycentric_interp_modes <<
134
if (brw->wm.
prog_data
->nr_params == 0) {
149
OUT_BATCH(ALIGN(brw->wm.
prog_data
->nr_params,
150
brw->wm.
prog_data
->dispatch_width) / 8);
181
if (brw->wm.
prog_data
->nr_params > 0)
189
if (brw->wm.
prog_data
->dual_src_blend &&
199
if (brw->wm.
prog_data
->dispatch_width == 8) {
201
if (brw->wm.
prog_data
->prog_offset_16)
207
dw5 |= (brw->wm.
prog_data
->first_curbe_grf <<
209
dw5 |= (brw->wm.
prog_data
->first_curbe_grf_16 <
[
all
...]
gen6_wm_state.c
53
if (brw->wm.
prog_data
->nr_params != 0) {
58
brw->wm.
prog_data
->nr_params *
62
for (i = 0; i < brw->wm.
prog_data
->nr_params; i++) {
63
constants[i] = *brw->wm.
prog_data
->param[i];
68
for (i = 0; i < brw->wm.
prog_data
->nr_params; i++) {
70
printf("g%d: ", brw->wm.
prog_data
->first_curbe_grf + i / 8);
105
if (brw->wm.
prog_data
->nr_params == 0) {
123
ALIGN(brw->wm.
prog_data
->nr_params,
124
brw->wm.
prog_data
->dispatch_width) / 8 - 1);
146
dw4 |= (brw->wm.
prog_data
->first_curbe_grf <
[
all
...]
brw_vs_state.c
51
vs->thread0.grf_reg_count = ALIGN(brw->vs.
prog_data
->total_grf, 16) / 16 - 1;
76
if (brw->vs.
prog_data
->total_scratch != 0) {
80
ffs(brw->vs.
prog_data
->total_scratch) - 11;
86
vs->thread3.urb_entry_read_length = brw->vs.
prog_data
->urb_read_length;
87
vs->thread3.const_urb_entry_read_length = brw->vs.
prog_data
->curb_read_length;
92
if (ctx->Transform.ClipPlanesEnabled && !brw->vs.
prog_data
->uses_new_param_layout) {
157
if (brw->vs.
prog_data
->total_scratch != 0) {
gen6_vs_state.c
44
unsigned int nr_params = brw->vs.
prog_data
->nr_params / 4;
57
if (brw->vs.
prog_data
->nr_params == 0 && !ctx->Transform.ClipPlanesEnabled) {
69
if (brw->vs.
prog_data
->uses_new_param_layout) {
70
for (i = 0; i < brw->vs.
prog_data
->nr_params; i++) {
71
*param = *brw->vs.
prog_data
->param[i];
74
params_uploaded += brw->vs.
prog_data
->nr_params / 4;
182
if (brw->vs.
prog_data
->total_scratch) {
185
ffs(brw->vs.
prog_data
->total_scratch) - 11);
191
(brw->vs.
prog_data
->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
brw_wm_state.c
85
if (brw->wm.
prog_data
->prog_offset_16) {
90
assert(brw->wm.
prog_data
->first_curbe_grf ==
91
brw->wm.
prog_data
->first_curbe_grf_16);
95
wm->thread0.grf_reg_count = brw->wm.
prog_data
->reg_blocks;
96
wm->wm9.grf_reg_count_2 = brw->wm.
prog_data
->reg_blocks_16;
110
brw->wm.
prog_data
->prog_offset_16 +
118
if (brw->wm.
prog_data
->total_scratch != 0) {
122
ffs(brw->wm.
prog_data
->total_scratch) - 11;
128
wm->thread3.dispatch_grf_start_reg = brw->wm.
prog_data
->first_curbe_grf;
129
wm->thread3.urb_entry_read_length = brw->wm.
prog_data
->urb_read_length
[
all
...]
brw_vs.c
57
*
prog_data
->userclip and
prog_data
->outputs_written in their key
65
struct brw_vue_map *vue_map = &c->
prog_data
.vue_map;
66
GLbitfield64 outputs_written = c->
prog_data
.outputs_written;
213
c.
prog_data
.outputs_written = vp->program.Base.OutputsWritten;
214
c.
prog_data
.inputs_read = vp->program.Base.InputsRead;
217
c.
prog_data
.outputs_written |= BITFIELD64_BIT(VERT_RESULT_EDGE);
218
c.
prog_data
.inputs_read |= VERT_BIT_EDGEFLAG;
229
c.
prog_data
.outputs_written |= BITFIELD64_BIT(VERT_RESULT_TEX0 + i);
250
if (c.
prog_data
.nr_pull_params
[
all
...]
brw_sf.c
68
c.vue_map = brw->vs.
prog_data
->vue_map;
83
c.
prog_data
.urb_read_length = c.nr_attr_regs;
84
c.
prog_data
.urb_entry_size = c.nr_setup_regs * 2;
128
&c.
prog_data
, sizeof(c.
prog_data
),
129
&brw->sf.prog_offset, &brw->sf.
prog_data
);
148
key.attrs = brw->vs.
prog_data
->outputs_written;
208
&brw->sf.prog_offset, &brw->sf.
prog_data
)) {
brw_gs.c
59
c.vue_map = brw->vs.
prog_data
->vue_map;
148
&c.
prog_data
, sizeof(c.
prog_data
),
149
&brw->gs.prog_offset, &brw->gs.
prog_data
);
169
key->attrs = brw->vs.
prog_data
->outputs_written;
184
key->userclip_active = brw->vs.
prog_data
->userclip;
254
&brw->gs.prog_offset, &brw->gs.
prog_data
)) {
gen7_vs_state.c
92
if (brw->vs.
prog_data
->total_scratch) {
95
ffs(brw->vs.
prog_data
->total_scratch) - 11);
101
(brw->vs.
prog_data
->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
brw_clip_state.c
48
clip->thread0.grf_reg_count = (ALIGN(brw->clip.
prog_data
->total_grf, 16) /
60
clip->thread3.urb_entry_read_length = brw->clip.
prog_data
->urb_read_length;
62
brw->clip.
prog_data
->curb_read_length;
104
clip->clip5.clip_mode = brw->clip.
prog_data
->clip_mode;
brw_gs_state.c
51
gs->thread0.grf_reg_count = (ALIGN(brw->gs.
prog_data
->total_grf, 16) /
68
gs->thread3.urb_entry_read_length = brw->gs.
prog_data
->urb_read_length;
gen6_gs_state.c
54
(brw->gs.
prog_data
->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT));
61
(brw->gs.
prog_data
->svbi_postincrement_value <<
brw_vs_surface_state.c
64
if (!brw->vs.
prog_data
->nr_pull_params) {
77
brw->vs.
prog_data
->nr_pull_params * 4,
81
for (i = 0; i < brw->vs.
prog_data
->nr_pull_params; i++) {
83
brw->vs.
prog_data
->pull_param[i],
151
if (brw->vs.
prog_data
->num_surfaces == 0) {
/external/mesa3d/src/mesa/drivers/dri/i965/
gen7_wm_state.c
68
dw1 |= brw->wm.
prog_data
->barycentric_interp_modes <<
134
if (brw->wm.
prog_data
->nr_params == 0) {
149
OUT_BATCH(ALIGN(brw->wm.
prog_data
->nr_params,
150
brw->wm.
prog_data
->dispatch_width) / 8);
181
if (brw->wm.
prog_data
->nr_params > 0)
189
if (brw->wm.
prog_data
->dual_src_blend &&
199
if (brw->wm.
prog_data
->dispatch_width == 8) {
201
if (brw->wm.
prog_data
->prog_offset_16)
207
dw5 |= (brw->wm.
prog_data
->first_curbe_grf <<
209
dw5 |= (brw->wm.
prog_data
->first_curbe_grf_16 <
[
all
...]
gen6_wm_state.c
53
if (brw->wm.
prog_data
->nr_params != 0) {
58
brw->wm.
prog_data
->nr_params *
62
for (i = 0; i < brw->wm.
prog_data
->nr_params; i++) {
63
constants[i] = *brw->wm.
prog_data
->param[i];
68
for (i = 0; i < brw->wm.
prog_data
->nr_params; i++) {
70
printf("g%d: ", brw->wm.
prog_data
->first_curbe_grf + i / 8);
105
if (brw->wm.
prog_data
->nr_params == 0) {
123
ALIGN(brw->wm.
prog_data
->nr_params,
124
brw->wm.
prog_data
->dispatch_width) / 8 - 1);
146
dw4 |= (brw->wm.
prog_data
->first_curbe_grf <
[
all
...]
brw_vs_state.c
51
vs->thread0.grf_reg_count = ALIGN(brw->vs.
prog_data
->total_grf, 16) / 16 - 1;
76
if (brw->vs.
prog_data
->total_scratch != 0) {
80
ffs(brw->vs.
prog_data
->total_scratch) - 11;
86
vs->thread3.urb_entry_read_length = brw->vs.
prog_data
->urb_read_length;
87
vs->thread3.const_urb_entry_read_length = brw->vs.
prog_data
->curb_read_length;
92
if (ctx->Transform.ClipPlanesEnabled && !brw->vs.
prog_data
->uses_new_param_layout) {
157
if (brw->vs.
prog_data
->total_scratch != 0) {
gen6_vs_state.c
44
unsigned int nr_params = brw->vs.
prog_data
->nr_params / 4;
57
if (brw->vs.
prog_data
->nr_params == 0 && !ctx->Transform.ClipPlanesEnabled) {
69
if (brw->vs.
prog_data
->uses_new_param_layout) {
70
for (i = 0; i < brw->vs.
prog_data
->nr_params; i++) {
71
*param = *brw->vs.
prog_data
->param[i];
74
params_uploaded += brw->vs.
prog_data
->nr_params / 4;
182
if (brw->vs.
prog_data
->total_scratch) {
185
ffs(brw->vs.
prog_data
->total_scratch) - 11);
191
(brw->vs.
prog_data
->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
brw_wm_state.c
85
if (brw->wm.
prog_data
->prog_offset_16) {
90
assert(brw->wm.
prog_data
->first_curbe_grf ==
91
brw->wm.
prog_data
->first_curbe_grf_16);
95
wm->thread0.grf_reg_count = brw->wm.
prog_data
->reg_blocks;
96
wm->wm9.grf_reg_count_2 = brw->wm.
prog_data
->reg_blocks_16;
110
brw->wm.
prog_data
->prog_offset_16 +
118
if (brw->wm.
prog_data
->total_scratch != 0) {
122
ffs(brw->wm.
prog_data
->total_scratch) - 11;
128
wm->thread3.dispatch_grf_start_reg = brw->wm.
prog_data
->first_curbe_grf;
129
wm->thread3.urb_entry_read_length = brw->wm.
prog_data
->urb_read_length
[
all
...]
brw_vs.c
57
*
prog_data
->userclip and
prog_data
->outputs_written in their key
65
struct brw_vue_map *vue_map = &c->
prog_data
.vue_map;
66
GLbitfield64 outputs_written = c->
prog_data
.outputs_written;
213
c.
prog_data
.outputs_written = vp->program.Base.OutputsWritten;
214
c.
prog_data
.inputs_read = vp->program.Base.InputsRead;
217
c.
prog_data
.outputs_written |= BITFIELD64_BIT(VERT_RESULT_EDGE);
218
c.
prog_data
.inputs_read |= VERT_BIT_EDGEFLAG;
229
c.
prog_data
.outputs_written |= BITFIELD64_BIT(VERT_RESULT_TEX0 + i);
250
if (c.
prog_data
.nr_pull_params
[
all
...]
brw_sf.c
68
c.vue_map = brw->vs.
prog_data
->vue_map;
83
c.
prog_data
.urb_read_length = c.nr_attr_regs;
84
c.
prog_data
.urb_entry_size = c.nr_setup_regs * 2;
128
&c.
prog_data
, sizeof(c.
prog_data
),
129
&brw->sf.prog_offset, &brw->sf.
prog_data
);
148
key.attrs = brw->vs.
prog_data
->outputs_written;
208
&brw->sf.prog_offset, &brw->sf.
prog_data
)) {
brw_gs.c
59
c.vue_map = brw->vs.
prog_data
->vue_map;
148
&c.
prog_data
, sizeof(c.
prog_data
),
149
&brw->gs.prog_offset, &brw->gs.
prog_data
);
169
key->attrs = brw->vs.
prog_data
->outputs_written;
184
key->userclip_active = brw->vs.
prog_data
->userclip;
254
&brw->gs.prog_offset, &brw->gs.
prog_data
)) {
gen7_vs_state.c
92
if (brw->vs.
prog_data
->total_scratch) {
95
ffs(brw->vs.
prog_data
->total_scratch) - 11);
101
(brw->vs.
prog_data
->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
brw_clip_state.c
48
clip->thread0.grf_reg_count = (ALIGN(brw->clip.
prog_data
->total_grf, 16) /
60
clip->thread3.urb_entry_read_length = brw->clip.
prog_data
->urb_read_length;
62
brw->clip.
prog_data
->curb_read_length;
104
clip->clip5.clip_mode = brw->clip.
prog_data
->clip_mode;
brw_gs_state.c
51
gs->thread0.grf_reg_count = (ALIGN(brw->gs.
prog_data
->total_grf, 16) /
68
gs->thread3.urb_entry_read_length = brw->gs.
prog_data
->urb_read_length;
gen6_gs_state.c
54
(brw->gs.
prog_data
->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT));
61
(brw->gs.
prog_data
->svbi_postincrement_value <<
Completed in 6507 milliseconds
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