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  /external/libffi/src/ia64/
unix.S 112 ld8 r17 = [r18]
115 add r17 = r17, r18
117 mov b6 = r17
184 add r17 = 16, sp
190 (p7) st8 [r17] = r10
306 add r17 = 16 + 8*16 + 16, sp
309 stf.spill [r17] = f9, 32
313 stf.spill [r17] = f11, 32
316 stf.spill [r17] = f13, 3
    [all...]
  /external/oprofile/module/ia64/
IA64minstate.h 167 adds r17=8, r1; \
170 st8 [r17]=rCRIIP, 16; /* save cr.iip */ \
174 st8 [r17]=rARUNAT, 16; /* save ar.unat */ \
178 st8 [r17]=rARRSC, 16; /* save ar.rsc */ \
180 ;; /* avoid RAW on r16 & r17 */ \
182 (pKern) adds r17=16, r17; /* skip over ar_bspstore field */ \
184 (pUser) st8 [r17]=rARBSPSTORE, 16; /* save ar.bspstore */ \
187 st8 [r17]=rB6, 16; /* save b6 */ \
192 st8.spill [r17]=rR1, 16; /* save original r1 */
    [all...]
IA64syscallstub.h 37 mov r17=rp; \
51 st8 [r16]=r17; /* save krp */ \
125 addl r17=.L5_##name - .L4_##name, r3; \
127 mov b6=r17; \
  /external/clang/test/CXX/except/except.spec/
p3.cpp 73 extern void (*r17)(); // expected-note {{previous declaration}}
74 extern void (*r17)() noexcept(false); // expected-error {{does not match}}
  /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/
ia64.S 559 { .mii; add r17=8,r34
628 add r17=8,r34 }
639 ldf8 f121=[r17],32 }
643 ldf8 f125=[r17] }
712 { .mfi; getf.sig r17=f51
733 add r17=r17,r16 }
741 cmp.ltu p7,p0=r17,r16 }
742 { .mfi; add r18=r18,r17
747 { .mfi; cmp.ltu p7,p0=r18,r17
    [all...]
ia64-mont.pl 95 tp_1=r17; // &tp[-1]
364 a1=r16; a2=r17; a3=r18; a4=r19; a5=r20; a6=r21; a7=r22; a8=r23;
383 { .mmi; add r17=-6*16,sp
391 stf.spill [r17]=f17,32
396 stf.spill [r17]=f19,32
401 stf.spill [r17]=f21,32
406 stf.spill [r17]=f23
756 (p0) add r17=-6*16,prevsp };;
836 ldf.fill f17=[r17],64
842 ldf.fill f21=[r17]
    [all...]
  /external/openssl/crypto/bn/asm/
ia64.S 559 { .mii; add r17=8,r34
628 add r17=8,r34 }
639 ldf8 f121=[r17],32 }
643 ldf8 f125=[r17] }
712 { .mfi; getf.sig r17=f51
733 add r17=r17,r16 }
741 cmp.ltu p7,p0=r17,r16 }
742 { .mfi; add r18=r18,r17
747 { .mfi; cmp.ltu p7,p0=r18,r17
    [all...]
ia64-mont.pl 95 tp_1=r17; // &tp[-1]
364 a1=r16; a2=r17; a3=r18; a4=r19; a5=r20; a6=r21; a7=r22; a8=r23;
383 { .mmi; add r17=-6*16,sp
391 stf.spill [r17]=f17,32
396 stf.spill [r17]=f19,32
401 stf.spill [r17]=f21,32
406 stf.spill [r17]=f23
756 (p0) add r17=-6*16,prevsp };;
836 ldf.fill f17=[r17],64
842 ldf.fill f21=[r17]
    [all...]
  /external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/
sha1-ppc.pl 68 @X=("r16","r17","r18","r19","r20","r21","r22","r23",
129 lwz r17,4($ctx)
172 $PUSH r17,`$FRAME-$SIZE_T*15`($sp)
223 lbz r17,1($inp)
228 stb r17,1(r20)
247 $POP r17,`$FRAME-$SIZE_T*15`($sp)
300 add r17,r17,$T
306 stw r17,4($ctx)
307 mr $B,r17
    [all...]
sha512-ppc.pl 118 @X=("r16","r17","r18","r19","r20","r21","r22","r23",
196 $PUSH r17,`$FRAME-$SIZE_T*15`($sp)
261 lbz r17,1($inp)
266 stb r17,1(r20)
291 $POP r17,`$FRAME-$SIZE_T*15`($sp)
350 $LD r17,`1*$SZ`($ctx)
359 add $B,$B,r17
sha1-ia64.pl 44 @X= ( "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
  /external/openssl/crypto/sha/asm/
sha1-ppc.pl 68 @X=("r16","r17","r18","r19","r20","r21","r22","r23",
129 lwz r17,4($ctx)
172 $PUSH r17,`$FRAME-$SIZE_T*15`($sp)
223 lbz r17,1($inp)
228 stb r17,1(r20)
247 $POP r17,`$FRAME-$SIZE_T*15`($sp)
300 add r17,r17,$T
306 stw r17,4($ctx)
307 mr $B,r17
    [all...]
sha512-ppc.pl 118 @X=("r16","r17","r18","r19","r20","r21","r22","r23",
196 $PUSH r17,`$FRAME-$SIZE_T*15`($sp)
261 lbz r17,1($inp)
266 stb r17,1(r20)
291 $POP r17,`$FRAME-$SIZE_T*15`($sp)
350 $LD r17,`1*$SZ`($ctx)
359 add $B,$B,r17
sha1-ia64.pl 44 @X= ( "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
  /external/valgrind/main/none/tests/ppc32/
test_isa_2_06_part2.c 45 register HWord_t r17 __asm__ ("r17");
914 __asm__ __volatile__ ("bpermd %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
916 (unsigned long long)r15, (unsigned long long)r17);
945 __asm__ __volatile__ ("divde %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
950 __asm__ __volatile__ ("divdeo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
955 __asm__ __volatile__ ("divde. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
960 __asm__ __volatile__ ("divdeo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
    [all...]
test_isa_2_06_part3.c 45 register HWord_t r17 __asm__ ("r17");
910 __asm__ __volatile__ ("divdeu %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
915 __asm__ __volatile__ ("divdeuo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
920 __asm__ __volatile__ ("divdeu. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
925 __asm__ __volatile__ ("divdeuo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
946 __asm__ __volatile__ ("divwe %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
951 __asm__ __volatile__ ("divweo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
956 __asm__ __volatile__ ("divwe. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
961 __asm__ __volatile__ ("divweo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15))
    [all...]
jm-insns.c 41 * I do preload test values in r14 thru r17 (or less, depending on the number
45 * I always get the result in r17 and also save XER and CCR for fixed-point
237 register HWord_t r17 __asm__ ("r17");
    [all...]
  /external/valgrind/main/none/tests/ppc64/
test_isa_2_06_part2.c 45 register HWord_t r17 __asm__ ("r17");
914 __asm__ __volatile__ ("bpermd %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
916 (unsigned long long)r15, (unsigned long long)r17);
945 __asm__ __volatile__ ("divde %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
950 __asm__ __volatile__ ("divdeo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
955 __asm__ __volatile__ ("divde. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
960 __asm__ __volatile__ ("divdeo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
    [all...]
test_isa_2_06_part3.c 45 register HWord_t r17 __asm__ ("r17");
910 __asm__ __volatile__ ("divdeu %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
915 __asm__ __volatile__ ("divdeuo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
920 __asm__ __volatile__ ("divdeu. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
925 __asm__ __volatile__ ("divdeuo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
946 __asm__ __volatile__ ("divwe %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
951 __asm__ __volatile__ ("divweo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
956 __asm__ __volatile__ ("divwe. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15));
961 __asm__ __volatile__ ("divweo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15))
    [all...]
  /external/llvm/test/MC/PowerPC/
ppc64-regs.s 21 #CHECK: .cfi_offset r17, 136
138 .cfi_offset r17,136
  /external/chromium_org/third_party/openssl/openssl/crypto/
ia64cpuid.S 83 { .mfi; mov r17=r0
  /external/libffi/src/powerpc/
aix.S 44 .set r17,17
aix_closure.S 44 .set r17,17
  /external/openssl/crypto/
ia64cpuid.S 83 { .mfi; mov r17=r0
  /external/valgrind/main/exp-bbv/tests/ppc32-linux/
ll.S 146 addi 4,17,1 # restore (plus one because r17 is decremented)
384 # r17 is start of buffer

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