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    Searched refs:r_S0 (Results 1 - 11 of 11) sorted by null

  /art/compiler/dex/quick/mips/
mips_lir.h 187 r_S0 = 16,
265 #define rMIPS_SUSPEND r_S0
target_mips.cc 28 r_S0, r_S1, r_S2, r_S3, r_S4, r_S5, r_S6, r_S7, r_T8,
30 static int ReservedRegs[] = {r_ZERO, r_AT, r_S0, r_S1, r_K0, r_K1, r_GP, r_SP,
  /dalvik/vm/compiler/codegen/mips/
MipsLIR.h 260 r_S0 = 16,
339 #define r4PC r_S0
RallocUtil.cpp 493 dvmCompilerClobber(cUnit, r_S0);
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CodegenDriver.cpp 615 int regPtr = r_S0; /* Preserved across call */
620 // moved lock for r_S0 and r_S4 here from below since genBoundsCheck
622 dvmCompilerLockTemp(cUnit, regPtr); // r_S0
663 * Using fixed registers here, and counting on r_S0 and r_S4 being
    [all...]
  /dalvik/vm/compiler/template/mips/
TEMPLATE_RESTORE_STATE.S 32 lw s0, r_S0*4(a0) # restore s0
TEMPLATE_SAVE_STATE.S 44 sw s0, r_S0*4(a0) # save s0
TEMPLATE_MEM_OP_DECODE.S 66 sw s0, r_S0*-4(sp) # push s0
113 lw s0, r_S0*-4(sp) # pop s0
header.S 62 #define r_S0 16
  /dalvik/vm/compiler/template/out/
CompilerTemplateAsm-mips.S 69 #define r_S0 16
    [all...]
  /dalvik/vm/compiler/codegen/mips/Mips32/
Factory.cpp 26 r_T3, r_T4, r_T5, r_T6, r_T7, r_T8, r_T9, r_S0, r_S4};

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