| /external/clang/test/CodeGen/ |
| const-init.c | 137 typedef long long v1i64 __attribute((vector_size(8))); typedef
143 static v1i64 a = (v1i64)10LL;
|
| x86_64-arguments.c | 235 typedef unsigned long long v1i64 __attribute__((__vector_size__(8))); typedef
239 v1i64 f34(v1i64 arg) { return arg; }
|
| /external/llvm/include/llvm/CodeGen/ |
| ValueTypes.h | 87 v1i64 = 36, // 1 x i64 enumerator in enum:llvm::MVT::SimpleValueType
205 SimpleTy == MVT::v2i32 || SimpleTy == MVT::v1i64 ||
285 case v1i64:
340 case v1i64: return 1;
383 case v1i64:
516 if (NumElements == 1) return MVT::v1i64;
|
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 154 case MVT::v1i64: return "v1i64";
217 case MVT::v1i64: return VectorType::get(Type::getInt64Ty(Context), 1);
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 488 { ISD::SDIV, MVT::v1i64, 1 * FunctionCallDivCost},
489 { ISD::UDIV, MVT::v1i64, 1 * FunctionCallDivCost},
490 { ISD::SREM, MVT::v1i64, 1 * FunctionCallDivCost},
491 { ISD::UREM, MVT::v1i64, 1 * FunctionCallDivCost},
|
| ARMISelLowering.cpp | 461 addDRTypeForNEON(MVT::v1i64);
542 // Neon does not support some operations on v1i64 and v2i64 types.
543 setOperationAction(ISD::MUL, MVT::v1i64, Expand);
553 setOperationAction(ISD::SETCC, MVT::v1i64, Expand);
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 95 case MVT::v1i64: return "MVT::v1i64";
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 63 addRegisterClass(MVT::v1i64, &AArch64::VPR64RegClass);
279 setOperationAction(ISD::BUILD_VECTOR, MVT::v1i64, Custom);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
