| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 213 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i32, 1 },
214 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i32, 1 },
242 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
243 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
267 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
268 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
274 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
275 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
277 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 },
278 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| ARMISelLowering.cpp | 154 addTypeForNEON(VT, MVT::f64, MVT::v2i32);
460 addDRTypeForNEON(MVT::v2i32);
580 setOperationAction(ISD::CTPOP, MVT::v2i32, Custom);
612 MVT::v2i32};
[all...] |
| /external/clang/test/CodeGen/ |
| x86_64-arguments.c | 264 typedef unsigned v2i32 __attribute((__vector_size__(8))); typedef
265 v2i32 f36(v2i32 arg) { return arg; }
|
| /external/llvm/include/llvm/CodeGen/ |
| ValueTypes.h | 83 v2i32 = 32, // 2 x i32 enumerator in enum:llvm::MVT::SimpleValueType
205 SimpleTy == MVT::v2i32 || SimpleTy == MVT::v1i64 ||
281 case v2i32:
333 case v2i32:
382 case v2i32:
510 if (NumElements == 2) return MVT::v2i32;
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 62 AddPromotedToType(ISD::STORE, MVT::v2f32, MVT::v2i32);
74 AddPromotedToType(ISD::LOAD, MVT::v2f32, MVT::v2i32);
82 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2i32, Expand);
97 (int)MVT::v2i32,
|
| AMDILISelLowering.cpp | 56 (int)MVT::v2i32,
81 (int)MVT::v2i32,
403 INTTY = MVT::v2i32;
549 INTTY = MVT::v2i32;
566 INTTY = MVT::v2i32;
|
| R600ISelLowering.cpp | 37 addRegisterClass(MVT::v2i32, &AMDGPU::R600_Reg64RegClass);
54 setOperationAction(ISD::SETCC, MVT::v2i32, Expand);
77 setOperationAction(ISD::LOAD, MVT::v2i32, Custom);
85 setOperationAction(ISD::STORE, MVT::v2i32, Custom);
[all...] |
| SIISelLowering.cpp | 50 addRegisterClass(MVT::v2i32, &AMDGPU::VSrc_64RegClass);
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 64 (int)MVT::v2i32,
92 (int)MVT::v2i32,
501 INTTY = MVT::v2i32;
649 INTTY = MVT::v2i32;
667 INTTY = MVT::v2i32;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 64 (int)MVT::v2i32,
92 (int)MVT::v2i32,
501 INTTY = MVT::v2i32;
649 INTTY = MVT::v2i32;
667 INTTY = MVT::v2i32;
|
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 150 case MVT::v2i32: return "v2i32";
213 case MVT::v2i32: return VectorType::get(Type::getInt32Ty(Context), 2);
|
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 91 case MVT::v2i32: return "MVT::v2i32";
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 60 case MVT::v2i32:
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 62 addRegisterClass(MVT::v2i32, &AArch64::VPR64RegClass);
277 setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Custom);
289 setOperationAction(ISD::SETCC, MVT::v2i32, Custom);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.cpp | [all...] |
