/external/llvm/test/Analysis/ScalarEvolution/ |
sext-iv-1.ll | 21 %5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1] 44 %5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1] 67 %5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1] 90 %5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1]
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scev-aa.ll | 27 %z = fmul double %x, %y 66 %z = fmul double %x, %y 73 %b = fmul double %x, %a 123 %z = fmul double %x, %y 130 %b = fmul double %x, %a
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/external/llvm/test/Bitcode/ |
function-encoding-rel-operands.ll | 30 %4 = fmul double %3, %3
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/external/llvm/test/CodeGen/ARM/ |
2010-04-09-NeonSelect.ll | 11 %4 = fmul <4 x float> %3, <float 0.000000e+00, float 0x3FED906BC0000000, float 0x3FE6A09E60000000, float 0xBFD87DE2A0000000> ; <<4 x float>> [#uses=1]
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/external/llvm/test/CodeGen/Mips/ |
analyzebranch.ll | 18 %mul = fmul double %sub, 2.000000e+00
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/external/llvm/test/CodeGen/PowerPC/ |
2008-10-28-f128-i32.ll | 9 %1 = fmul ppc_fp128 %a, 0xM3DF00000000000000000000000000000 ; <ppc_fp128> [#uses=1]
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2008-09-12-CoalescerBug.ll | 32 %13 = fmul float %10, 6.553500e+04 ; <float> [#uses=1] 34 %15 = fmul float %12, 6.553500e+04 ; <float> [#uses=1] 71 %40 = fmul float %37, 6.553500e+04 ; <float> [#uses=1] 73 %42 = fmul float %39, 6.553500e+04 ; <float> [#uses=1] 91 %53 = fmul float %50, 6.553500e+04 ; <float> [#uses=1] 93 %55 = fmul float %52, 6.553500e+04 ; <float> [#uses=1] 114 %76 = fmul float %73, 6.553500e+04 ; <float> [#uses=1] 116 %78 = fmul float %75, 6.553500e+04 ; <float> [#uses=1] 137 %89 = fmul float %86, 6.553500e+04 ; <float> [#uses=1] 139 %91 = fmul float %88, 6.553500e+04 ; <float> [#uses=1 [all...] |
/external/llvm/test/CodeGen/R600/ |
r600-encoding.ll | 17 %2 = fmul float %0, %1
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/external/llvm/test/CodeGen/Thumb2/ |
2009-08-04-SubregLoweringBug2.ll | 20 %0 = fmul float undef, 0x41E0000000000000 ; <float> [#uses=1]
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/external/llvm/test/CodeGen/X86/ |
2007-03-01-SpillerCrash.ll | 6 fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:0 [#uses=4] 9 fmul <4 x float> %0, %2 ; <<4 x float>>:3 [#uses=1] 11 fmul <4 x float> %4, zeroinitializer ; <<4 x float>>:5 [#uses=2] 57 fmul <4 x float> %34, < float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01 > ; <<4 x float>>:35 [#uses=1]
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2007-11-06-InstrSched.ll | 16 %tmp11 = fmul float %tmp9, %tmp45 ; <float> [#uses=1]
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extract-combine.ll | 11 %mul.i25621 = fmul <4 x float> zeroinitializer, %sub.i25620 ; <<4 x float>> [#uses=1]
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stride-reuse.ll | 18 %tmp4 = fmul float %tmp3, 2.000000e+00
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2008-02-27-DeadSlotElimBug.ll | 27 %tmp17.i76 = fmul double %tmp4344, 0.000000e+00 ; <double> [#uses=1] 32 %tmp17.i63 = fmul double %tmp5051, 0.000000e+00 ; <double> [#uses=1] 38 %tmp17.i = fmul double %tmp5657, %tmp16.i50 ; <double> [#uses=1]
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2012-04-26-sdglue.ll | 30 %tmp26 = fmul <8 x float> %tmp17, undef 31 %tmp27 = fmul <8 x float> %tmp25, undef 35 %tmp31 = fmul <4 x float> undef, %tmp30
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multiple-loop-post-inc.ll | 42 %12 = fmul float %11, %x.0 ; <float> [#uses=1] 64 %19 = fmul float %0, 4.000000e+00 ; <float> [#uses=1] 66 %20 = fmul float %0, 1.600000e+01 ; <float> [#uses=1] 68 %21 = fmul float %0, 0.000000e+00 ; <float> [#uses=1] 71 %24 = fmul float %0, 2.000000e+00 ; <float> [#uses=1] 73 %26 = fmul float %0, 3.000000e+00 ; <float> [#uses=1] 134 %40 = fmul <4 x float> %36, %vX0.039 ; <<4 x float>> [#uses=1] 136 %42 = fmul <4 x float> %37, %vX1.036 ; <<4 x float>> [#uses=1] 137 %43 = fmul <4 x float> %38, %vX2.037 ; <<4 x float>> [#uses=1] 138 %44 = fmul <4 x float> %39, %vX3.041 ; <<4 x float>> [#uses=1 [all...] |
2007-04-24-VectorCrash.ll | 32 fmul <4 x float> %22, zeroinitializer ; <<4 x float>>:23 [#uses=1] 38 fmul <4 x float> zeroinitializer, %28 ; <<4 x float>>:29 [#uses=1] 40 fmul <4 x float> zeroinitializer, %30 ; <<4 x float>>:31 [#uses=1] 42 fmul <4 x float> zeroinitializer, %32 ; <<4 x float>>:33 [#uses=1] 44 fmul <4 x float> zeroinitializer, %34 ; <<4 x float>>:35 [#uses=1]
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fold-pcmpeqd-2.ll | 41 %mul166.i = fmul <4 x float> zeroinitializer, %sub140.i ; <<4 x float>> [#uses=1] 43 %mul171.i = fmul <4 x float> %add167.i, %sub140.i ; <<4 x float>> [#uses=1] 48 %mul186.i = fmul <4 x float> %bitcast179.i, zeroinitializer ; <<4 x float>> [#uses=1] 54 %mul310 = fmul <4 x float> %bitcast204.i104, zeroinitializer ; <<4 x float>> [#uses=2] 55 %mul313 = fmul <4 x float> %bitcast204.i, zeroinitializer ; <<4 x float>> [#uses=1]
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/external/llvm/test/Feature/ |
ppcld.ll | 18 %tmp3 = fmul double %tmp1, %tmp2 ; <double> [#uses=1]
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x86ld.ll | 18 %tmp3 = fmul double %tmp1, %tmp2 ; <double> [#uses=1]
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/external/llvm/test/Transforms/InstCombine/ |
phi-merge-gep.ll | 49 %36 = fmul float %30, -1.500000e+00 ; <float> [#uses=1] 50 %37 = fmul float %31, -1.500000e+00 ; <float> [#uses=1] 53 %40 = fmul float %32, 0x3FEBB67AE0000000 ; <float> [#uses=2] 54 %41 = fmul float %33, 0x3FEBB67AE0000000 ; <float> [#uses=2]
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sqrt.ll | 43 %mul18 = fmul float %tmp14, %tmp14
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/external/llvm/test/Transforms/LoopUnroll/ |
shifted-tripcount.ll | 21 %mul9 = fmul double %tmp8, %tmp4 ; <double> [#uses=1]
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/external/llvm/test/Transforms/SLPVectorizer/X86/ |
phi.ll | 67 ;CHECK: fmul <2 x double> 83 %mul = fmul double %add, 4.000000e+00 84 %mul3 = fmul double %add2, 4.000000e+00
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/external/clang/test/CodeGen/ |
fp16-ops.c | 47 // CHECK: fmul float 53 // CHECK: fmul float 57 // CHECK: fmul float 61 // CHECK: fmul float 257 // CHECK: fmul 262 // CHECK: fmul 266 // CHECK: fmul
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