| /external/valgrind/main/auxprogs/ |
| ppcfround.c | 209 INSN(fmul, "fmul %%f4, %%f1,%%f2");
210 INSN(fmul_, "fmul. %%f4, %%f1,%%f2");
463 do_N_binary("fmul", insn_fmul, args, nargs, SHOW_ALL);
|
| /external/valgrind/main/none/tests/amd64/ |
| insn_fpu.def | 275 fmul st0.ps[1234.5678] st2.ps[8765.4321] => st2.ps[10821520.2237464]
276 fmul st0.ps[-1234.5678] st2.ps[8765.4321] => st2.ps[-10821520.2237464]
277 fmul st0.ps[1234.5678] st2.ps[-8765.4321] => st2.ps[-10821520.2237464]
278 fmul st0.ps[-1234.5678] st2.ps[-8765.4321] => st2.ps[10821520.2237464]
279 fmul st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st2.pd[9449778125285.66]
280 fmul st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st2.pd[-9449778125285.66]
281 fmul st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[-9449778125285.66]
282 fmul st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[9449778125285.66]
283 fmul st2.ps[1234.5678] st0.ps[8765.4321] => st0.ps[10821520.2237464]
284 fmul st2.ps[-1234.5678] st0.ps[8765.4321] => st0.ps[-10821520.2237464
[all...] |
| /external/valgrind/main/none/tests/x86/ |
| insn_fpu.def | 275 fmul st0.ps[1234.5678] st2.ps[8765.4321] => st2.ps[10821520.2237464]
276 fmul st0.ps[-1234.5678] st2.ps[8765.4321] => st2.ps[-10821520.2237464]
277 fmul st0.ps[1234.5678] st2.ps[-8765.4321] => st2.ps[-10821520.2237464]
278 fmul st0.ps[-1234.5678] st2.ps[-8765.4321] => st2.ps[10821520.2237464]
279 fmul st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st2.pd[9449778125285.66]
280 fmul st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st2.pd[-9449778125285.66]
281 fmul st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[-9449778125285.66]
282 fmul st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[9449778125285.66]
283 fmul st2.ps[1234.5678] st0.ps[8765.4321] => st0.ps[10821520.2237464]
284 fmul st2.ps[-1234.5678] st0.ps[8765.4321] => st0.ps[-10821520.2237464
[all...] |
| /external/llvm/docs/tutorial/ |
| LangImpl3.rst | 478 %multmp = fmul double %a, %a
479 %multmp1 = fmul double 2.000000e+00, %a
480 %multmp2 = fmul double %multmp1, %b
482 %multmp3 = fmul double %b, %b
538 %multmp = fmul double %a, %a
539 %multmp1 = fmul double 2.000000e+00, %a
540 %multmp2 = fmul double %multmp1, %b
542 %multmp3 = fmul double %b, %b
|
| LangImpl4.rst | 79 %multmp = fmul double %addtmp, %addtmp1
198 %multmp = fmul double %addtmp, %addtmp
308 %multmp = fmul double %y, 2.000000e+00
361 %multmp = fmul double %calltmp, %calltmp
363 %multmp4 = fmul double %calltmp2, %calltmp2
|
| OCamlLangImpl3.rst | 428 %multmp = fmul double %a, %a
429 %multmp1 = fmul double 2.000000e+00, %a
430 %multmp2 = fmul double %multmp1, %b
432 %multmp3 = fmul double %b, %b
485 %multmp = fmul double %a, %a
486 %multmp1 = fmul double 2.000000e+00, %a
487 %multmp2 = fmul double %multmp1, %b
489 %multmp3 = fmul double %b, %b
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| 2007-01-19-InfiniteLoop.ll | 43 %tmp631 = fmul double %tmp629a, 0.000000e+00 ; <double> [#uses=1]
54 %tmp671 = fmul double %tmp667, %tmp667 ; <double> [#uses=1]
|
| 2009-07-18-RewriterBug.ll | 95 %48 = fmul double %46, %47 ; <double> [#uses=1]
98 %51 = fmul double %49, %50 ; <double> [#uses=1]
115 %65 = fmul double %63, %64 ; <double> [#uses=1]
118 %68 = fmul double %66, %67 ; <double> [#uses=1]
274 %196 = fmul double %194, %195 ; <double> [#uses=1]
277 %199 = fmul double %197, %198 ; <double> [#uses=1]
424 %307 = fmul double %292, %303 ; <double> [#uses=1]
425 %308 = fmul double %295, %300 ; <double> [#uses=1]
427 %310 = fmul double %306, %309 ; <double> [#uses=1]
429 %312 = fmul double %300, %287 ; <double> [#uses=1
[all...] |
| reg_sequence.ll | 206 %2 = fmul <4 x float> %1, undef ; <<4 x float>> [#uses=1]
207 %3 = fmul <4 x float> undef, %2 ; <<4 x float>> [#uses=1]
285 %7 = fmul <4 x float> undef, %6 ; <<4 x float>> [#uses=1]
289 %11 = fmul <4 x float> %10, <float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01> ; <<4 x float>> [#uses=1]
292 %14 = fmul <4 x float> %13, undef ; <<4 x float>> [#uses=1]
295 %17 = fmul <4 x float> %16, undef ; <<4 x float>> [#uses=1]
|
| /external/llvm/test/Transforms/InstCombine/ |
| mul.ll | 30 %B = fmul double 1.000000e+00, %A ; <double> [#uses=1]
111 fmul <4 x float> %2, < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >
|
| pow-1.ll | 123 ; CHECK-NEXT: [[SQUARE:%[a-z0-9]+]] = fmul float %x, %x
131 ; CHECK-NEXT: [[SQUARE:%[a-z0-9]+]] = fmul double %x, %x
|
| shufflemask-undef.ll | 78 fmul <4 x float> %5, zeroinitializer ; <<4 x float>>:6 [#uses=2]
79 fmul <4 x float> %6, %6 ; <<4 x float>>:7 [#uses=1]
87 fmul <4 x float> %10, < float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01 > ; <<4 x float>>:11 [#uses=1]
|
| /external/llvm/test/MC/X86/ |
| intel-syntax.s | 542 // CHECK: fmul %st(1)
548 fmul ST(0), ST(1) label
555 // CHECK: fmul %st(0), %st(1)
561 fmul ST(1), ST(0) label
568 // CHECK: fmul %st(1)
574 fmul ST(1) label
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 448 case ISD::FMUL:
452 // fold (fneg (fmul X, Y)) -> (fmul (fneg X), Y) or (fmul X, (fneg Y))
516 case ISD::FMUL:
520 // fold (fneg (fmul X, Y)) -> (fmul (fneg X), Y)
529 // fold (fneg (fmul X, Y)) -> (fmul X, (fneg Y))
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXVector.td | 510 (fmul regclass:$a, regclass:$b), regclass:$c))], sop>,
526 defm VMulf : FloatBinVOp<"mul.", fmul, FMULf64rr, FMULf32rr, FMULf32rr_ftz>;
528 defm F32MAD_ftz : VMAD<"mad.ftz.f32", V4F32Regs, V2F32Regs, fadd, fmul,
530 defm F32FMA_ftz : VMAD<"fma.rn.ftz.f32", V4F32Regs, V2F32Regs, fadd, fmul,
532 defm F32MAD : VMAD<"mad.f32", V4F32Regs, V2F32Regs, fadd, fmul, FMAD32rrr,
534 defm F32FMA : VMAD<"fma.rn.f32", V4F32Regs, V2F32Regs, fadd, fmul, FMA32rrr,
578 def : Pat<(fsub V2F32Regs:$a, (fmul V2F32Regs:$b, V2F32Regs:$c)),
582 def : Pat<(fsub (fmul V2F32Regs:$a, V2F32Regs:$b), V2F32Regs:$c),
593 def : Pat<(fsub V4F32Regs:$a, (fmul V4F32Regs:$b, V4F32Regs:$c)),
597 def : Pat<(fsub (fmul V4F32Regs:$a, V4F32Regs:$b), V4F32Regs:$c)
[all...] |
| /external/llvm/test/Transforms/IndVarSimplify/ |
| iv-sext.ll | 129 %tmp39 = fmul float %tmp38, %tmp1 ; <float> [#uses=2]
130 %tmp40 = fmul float %tmp39, %tmp39 ; <float> [#uses=2]
131 %tmp41 = fmul float %tmp40, %tmp40 ; <float> [#uses=1]
|
| /external/proguard/src/proguard/classfile/instruction/ |
| Instruction.java | 143 false, // fmul
352 2, // fmul
561 1, // fmul
|
| /external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/ |
| sha1-sparcv9a.pl | 73 $fmul="%f32";
99 fmul8ulx16 %f18,$fmul,%f18 ! 5/10/ 7:Tmp>>=7, Tmp&=1
175 fmul8ulx16 %f18,$fmul,%f18 ! 5/10/ 7:Tmp>>=7, Tmp&=1
226 fmul8ulx16 %f18,$fmul,%f18 ! 5/10/ 7:Tmp>>=7, Tmp&=1
307 fmul8ulx16 %f18,$fmul,%f18 ! 5/10/ 7:Tmp>>=7, Tmp&=1
424 ldd [$tmp0+32],$fmul
|
| /external/openssl/crypto/sha/asm/ |
| sha1-sparcv9a.pl | 73 $fmul="%f32";
99 fmul8ulx16 %f18,$fmul,%f18 ! 5/10/ 7:Tmp>>=7, Tmp&=1
175 fmul8ulx16 %f18,$fmul,%f18 ! 5/10/ 7:Tmp>>=7, Tmp&=1
226 fmul8ulx16 %f18,$fmul,%f18 ! 5/10/ 7:Tmp>>=7, Tmp&=1
307 fmul8ulx16 %f18,$fmul,%f18 ! 5/10/ 7:Tmp>>=7, Tmp&=1
424 ldd [$tmp0+32],$fmul
|
| /external/javassist/src/main/javassist/bytecode/ |
| Opcode.java | 101 int FMUL = 106;
350 -1, // fmul, 106
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 256 /// than a pair of fmul and fadd instructions. fmuladd intrinsics will be
258 /// expanded to fmul + fadd.
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineMulDivRem.cpp | 10 // This file implements the visit functions for mul, fmul, sdiv, udiv, fdiv,
313 if (I->getOpcode() != Instruction::FMul || !I->hasUnsafeAlgebra())
327 /// true iff the given value is FMul or FDiv with one and only one operand
331 if (!I || (I->getOpcode() != Instruction::FMul &&
351 /// The input \p FMulOrDiv is a FMul/FDiv with one and only one operand
370 if (FMulOrDiv->getOpcode() == Instruction::FMul) {
495 Instruction *FMul = cast<Instruction>(FMulVal);
496 FMul->copyFastMathFlags(Log2);
[all...] |
| /external/llvm/test/Transforms/BBVectorize/ |
| simple-ldstr-ptrs.ll | 25 %r = fmul double %av, %av5
42 ; CHECK: %r = fmul double %av, %av5
|
| /external/llvm/test/CodeGen/Thumb2/ |
| constant-islands.ll | 275 %mul = fmul float 0x3FC3333340000000, %3
277 %mul2 = fmul float 0x3FC99999A0000000, %4
289 %mul6 = fmul float 0x3FC3333340000000, %7
291 %mul7 = fmul float 0x3FD1EB8520000000, %8
303 %mul15 = fmul float 0x3FB99999A0000000, %11
305 %mul16 = fmul float 0x3FA99999A0000000, %12
317 %mul24 = fmul float 0x3FB1EB8520000000, %15
319 %mul25 = fmul float 0x3FDCCCCCC0000000, %16
331 %mul33 = fmul float 0x3FA99999A0000000, %19
333 %mul34 = fmul float 0x3FD7AE1480000000, %2
[all...] |
| /dalvik/dx/tests/032-bb-live-code/ |
| blort.j | 266 fmul
|
