| /external/llvm/lib/CodeGen/ |
| SplitKit.h | 68 MachineBasicBlock *MBB;
170 /// isThroughBlock - Return true if CurLI is live through MBB without uses.
171 bool isThroughBlock(unsigned MBB) const { return ThroughBlocks.test(MBB); }
320 MachineBasicBlock &MBB,
327 /// getShallowDominator - Returns the least busy dominator of MBB that is
329 MachineBasicBlock *findShallowDominator(MachineBasicBlock *MBB,
379 /// enterIntvAtEnd - Enter the open interval at the end of MBB.
380 /// Use the open interval from he inserted copy to the MBB end.
382 SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB);
[all...] |
| TwoAddressInstructionPass.cpp | 81 MachineBasicBlock *MBB;
220 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot();
243 if (!KillMI || KillMI->getParent() != MBB || KillMI == MI ||
300 MBB->remove(MI);
301 MBB->insert(KillPos, MI);
311 /// last instruction in the MBB that defines the specified register and the
322 if (MI->getParent() != MBB || MI->isDebugValue())
452 MachineInstr *findOnlyInterestingUse(unsigned Reg, MachineBasicBlock *MBB,
461 if (UseMI.getParent() != MBB)
626 MachineFunction::iterator MFI = MBB;
[all...] |
| PrologEpilogInserter.cpp | 326 MachineBasicBlock* MBB = ReturnBlocks[ri];
327 I = MBB->end(); --I;
332 while (I2 != MBB->begin() && (--I2)->isTerminator())
335 bool AtStart = I == MBB->begin();
342 if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
346 TII.loadRegFromStackSlot(*MBB, I, Reg,
349 assert(I != MBB->begin() &&
354 I = MBB->begin();
369 MachineBasicBlock* MBB = BI->first;
383 I = MBB->begin()
[all...] |
| OptimizePHIs.cpp | 54 bool OptimizeBB(MachineBasicBlock &MBB);
154 bool OptimizePHIs::OptimizeBB(MachineBasicBlock &MBB) {
157 MII = MBB.begin(), E = MBB.end(); MII != E; ) {
|
| /external/llvm/include/llvm/CodeGen/ |
| FunctionLoweringInfo.h | 89 /// MBB - The current block.
90 MachineBasicBlock *MBB;
92 /// MBB - The current insert position inside the current block.
118 /// If the current MBB is a landing pad, the exception pointer and exception
224 MachineModuleInfo *MMI, MachineBasicBlock *MBB);
229 MachineBasicBlock *MBB);
|
| MachineBranchProbabilityInfo.h | 60 uint32_t getSumForBlock(const MachineBasicBlock *MBB, uint32_t &Scale) const;
67 MachineBasicBlock *getHotSucc(MachineBasicBlock *MBB) const;
|
| DFAPacketizer.h | 117 void PacketizeMIs(MachineBasicBlock *MBB,
133 void endPacket(MachineBasicBlock *MBB, MachineInstr *MI);
142 MachineBasicBlock *MBB) {
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonNewValueJump.cpp | 382 MachineBasicBlock* MBB = MBBb;
385 << MBB->getNumber() << "\n");
386 DEBUG(MBB->dump());
404 for (MachineBasicBlock::iterator MII = MBB->end(), E = MBB->begin();
438 //if(LVs.isLiveOut(predReg, *MBB)) break;
446 for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(),
447 SIE = MBB->succ_end(); SI != SIE; ++SI) {
596 MBB->splice(jmpPos, MI->getParent(), MI);
597 MBB->splice(jmpPos, MI->getParent(), cmpInstr)
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUMCInstLower.cpp | 67 const MachineBasicBlock *MBB = MI->getParent();
70 while (I != MBB->end() && I->isInsideBundle()) {
|
| SIInstrInfo.cpp | 37 SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
48 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg)
|
| AMDGPUAsmPrinter.cpp | 63 MachineBasicBlock &MBB = *BB;
64 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUMCInstLower.cpp | 68 const MachineBasicBlock *MBB = MI->getParent();
71 while (I != MBB->end() && I->isInsideBundle()) {
|
| SIFixSGPRCopies.cpp | 137 MachineBasicBlock &MBB = *BI;
138 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
|
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 190 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
229 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
233 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
234 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
241 virtual void insertSelect(MachineBasicBlock &MBB,
246 virtual void copyPhysReg(MachineBasicBlock &MBB,
250 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
263 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUMCInstLower.cpp | 67 const MachineBasicBlock *MBB = MI->getParent();
70 while (I != MBB->end() && I->isInsideBundle()) {
|
| SIInstrInfo.cpp | 37 SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
48 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg)
|
| AMDGPUAsmPrinter.cpp | 63 MachineBasicBlock &MBB = *BB;
64 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 594 MachineBasicBlock *MBB) const {
619 MachineFunction *MF = MBB->getParent();
620 const BasicBlock *LLVM_BB = MBB->getBasicBlock();
622 MachineFunction::iterator It = MBB;
637 EndBB->splice(EndBB->begin(), MBB,
639 MBB->end());
640 EndBB->transferSuccessorsAndUpdatePHIs(MBB);
645 // [... start of incoming MBB ...]
649 BuildMI(MBB, DL, TII->get(AArch64::LSFP128_STR))
653 BuildMI(MBB, DL, TII->get(AArch64::Bcc)
[all...] |
| AArch64RegisterInfo.cpp | 86 MachineBasicBlock &MBB = *MI.getParent();
87 MachineFunction &MF = *MBB.getParent();
142 emitRegUpdate(MBB, MBBI, MBBI->getDebugLoc(), TII,
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 385 emitLoadConstPool(MachineBasicBlock &MBB,
391 MachineFunction &MF = *MBB.getParent();
398 BuildMI(MBB, MBBI, dl, TII.get(ARM::LDRcp))
562 materializeFrameBaseRegister(MachineBasicBlock *MBB,
565 ARMFunctionInfo *AFI = MBB->getParent()->getInfo<ARMFunctionInfo>();
569 MachineBasicBlock::iterator Ins = MBB->begin();
571 if (Ins != MBB->end())
574 const MachineFunction &MF = *MBB->getParent();
575 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
580 MachineInstrBuilder MIB = AddDefaultPred(BuildMI(*MBB, Ins, DL, MCID, BaseReg
[all...] |
| ARMConstantPoolValue.h | 195 const MachineBasicBlock *MBB; // Machine basic block.
197 ARMConstantPoolMBB(LLVMContext &C, const MachineBasicBlock *mbb, unsigned id,
203 const MachineBasicBlock *mbb,
206 const MachineBasicBlock *getMBB() const { return MBB; }
|
| Thumb2RegisterInfo.h | 32 void emitLoadConstPool(MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/Mips/ |
| Mips16RegisterInfo.h | 32 bool saveScavengerRegister(MachineBasicBlock &MBB,
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 37 MachineBasicBlock *MBB;
128 MachineBasicBlock *getBlock() { return MBB; }
135 InstrEmitter(MachineBasicBlock *mbb, MachineBasicBlock::iterator insertpos);
|
| SelectionDAGISel.cpp | 254 // When new basic blocks are inserted and the edges from MBB to its successors
259 MachineBasicBlock *MBB) const {
468 const MachineBasicBlock *MBB = I;
469 for (MachineBasicBlock::const_iterator II = MBB->begin(), IE = MBB->end();
588 BlockNumber = FuncInfo->MBB->getNumber();
590 FuncInfo->MBB->getBasicBlock()->getName().str();
704 Scheduler->Run(CurDAG, FuncInfo->MBB);
711 MachineBasicBlock *FirstMBB = FuncInfo->MBB, *LastMBB;
717 LastMBB = FuncInfo->MBB = Scheduler->EmitSchedule(FuncInfo->InsertPt)
[all...] |
