| /external/chromium_org/third_party/openssl/openssl/crypto/rc4/asm/ |
| rc4-586.pl | 84 &ror ($out,8) if ($i!=0);
238 &ror ($out,8);
|
| /external/chromium_org/third_party/skia/src/opts/ |
| SkBlitRow_opts_arm.cpp | 73 "uxtb r7, r3, ROR #16 \n\t"
74 "uxtb ip, r3, ROR #8 \n\t"
|
| /external/openssl/crypto/rc4/asm/ |
| rc4-586.pl | 84 &ror ($out,8) if ($i!=0);
238 &ror ($out,8);
|
| /external/skia/src/opts/ |
| SkBlitRow_opts_arm.cpp | 73 "uxtb r7, r3, ROR #16 \n\t"
74 "uxtb ip, r3, ROR #8 \n\t"
|
| /external/valgrind/main/VEX/priv/ |
| guest_amd64_defs.h | 390 rol/ror result zero old_flags
425 * rol/ror -- these only set O and C, and leave A Z C P alone.
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
| omxVCM4P2_MCReconBlock_s.s | 678 UXTB16 tmp2, dst, ROR #8 ;// tmp2 = [0d0b]
691 UXTB16 tmp2, dst, ROR #8
|
| /system/core/libpixelflinger/codeflinger/ |
| disassem.c | 266 "lsl", "lsr", "asr", "ror"
416 di->di_printf("ror #%d", ((insn >> 10) & 3) << 3);
|
| MIPSAssembler.cpp | 400 case ROR: if (mips32r2) {
511 case ROR: if (mips32r2) {
543 case ROR: if (mips32r2) {
[all...] |
| ARMAssemblerInterface.h | 43 LSL, LSR, ASR, ROR
|
| /external/llvm/lib/Target/ARM/ |
| ARMCodeEmitter.cpp | 441 case ARM_AM::ror:
[all...] |
| /external/chromium_org/third_party/openssl/openssl/crypto/aes/asm/ |
| aes-x86_64.pl | 457 ror \$16,$tmp
459 ror \$8,$tmp
502 ror \$16,$t0
503 ror \$16,$t1
510 ror \$8,$t0
511 ror \$8,$t1
533 ror \$16,$t2
534 ror \$16,$t3
539 ror \$8,$t2
540 ror \$8,$t
[all...] |
| /external/openssl/crypto/aes/asm/ |
| aes-x86_64.pl | 457 ror \$16,$tmp
459 ror \$8,$tmp
502 ror \$16,$t0
503 ror \$16,$t1
510 ror \$8,$t0
511 ror \$8,$t1
533 ror \$16,$t2
534 ror \$16,$t3
539 ror \$8,$t2
540 ror \$8,$t
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| ArmLIR.h | 395 kThumbRorRR, /* ror [0100000111] rs[5..3] rd[2..0] */
554 kThumb2RorRRR, /* ror [111110100110] rn[19..16] [1111] rd[11..8]
562 kThumb2RorRRI5, /* ror [11101010010011110] imm[14.12] rd[11..8]
[all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-arm.cc | [all...] |
| /art/compiler/utils/arm/ |
| constants_arm.h | 157 ROR = 3, // Rotate right
|
| /external/chromium_org/chrome/app/resources/terms/ |
| terms_ro.html | 49 <p>4.3 Ca parte a acestui proces continuu de inova?ie, recunoa?te?i ?i sunte?i de acord c? Google poate opri (definitiv sau temporar) furnizarea Serviciilor (sau a oric?ror func?ii din cadrul Serviciilor), pentru dvs. sau pentru utilizatori īn general, la libera alegere a Google, f?r? o notificare prealabil? pentru dvs. Pute?i īnceta utilizarea Serviciilor īn orice moment. Nu este necesar s? informa?i explicit Google atunci cānd īnceta?i utilizarea Serviciilor.</p>
106 <p>(II) ORIC?ROR MODIFIC?RI PE CARE LE POATE FACE GOOGLE ASUPRA SERVICIILOR SAU DATORIT? ORIC?REI ĪNCET?RI DEFINITIVE SAU TEMPORARE ĪN FURNIZAREA SERVICIILOR (ORI A ORIC?ROR FUNC?II DIN CADRUL SERVICIILOR);</p>
131 <p>19.6 Recunoa?te?i ?i sunte?i de acord c? fiecare membru al grupului de companii a c?ror companie-mam? este Google va fi beneficiar ter?? parte al Termenilor ?i c? aceste alte companii vor avea dreptul de a impune direct ?i de a se baza pe orice prevedere a Termenilor care le confer? un beneficiu (sau drepturi īn favoarea lor). Īn afar? de acestea, nicio alt? persoan? sau companie nu va fi beneficiar ter?? parte al Termenilor.</p>
[all...] |
| /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/test/ |
| test_class.py | 31 "ror",
|
| /prebuilts/python/linux-x86/2.7.5/lib/python2.7/test/ |
| test_class.py | 31 "ror",
|
| /external/dropbear/libtomcrypt/src/ciphers/twofish/ |
| twofish.c | 111 /* b1 = a0 ^ ROR(b0, 1) ^ 8a0 */
121 /* b3 = a2 ^ ROR(b2, 1) ^ 8a2 */
|
| /external/chromium_org/sandbox/win/src/sidestep/ |
| ia32_opcode_map.cpp | [all...] |
| /external/chromium_org/third_party/tcmalloc/chromium/src/windows/ |
| ia32_opcode_map.cc | [all...] |
| /external/chromium_org/third_party/tcmalloc/vendor/src/windows/ |
| ia32_opcode_map.cc | [all...] |
| /external/chromium_org/tools/memory_watcher/ |
| ia32_opcode_map.cc | [all...] |
| /external/chromium_org/tools/traceline/traceline/sidestep/ |
| ia32_opcode_map.cc | [all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/x86/ |
| assyntax.h | 591 #define ROR_L(a, b) CHOICE(rorl ARG2(a,b), rorl ARG2(a,b), _LTOG ror ARG2(b,a))
592 #define ROR_W(a, b) CHOICE(rorw ARG2(a,b), rorw ARG2(a,b), _WTOG ror ARG2(b,a))
[all...] |
