| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
| /external/mesa3d/src/mesa/x86/ |
| assyntax.h | 591 #define ROR_L(a, b) CHOICE(rorl ARG2(a,b), rorl ARG2(a,b), _LTOG ror ARG2(b,a))
592 #define ROR_W(a, b) CHOICE(rorw ARG2(a,b), rorw ARG2(a,b), _WTOG ror ARG2(b,a))
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm.cc | [all...] |
| assembler_arm.h | 422 void Ror(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
|
| /external/elfutils/libcpu/defs/ |
| i386 | 496 1101000{w},{mod}001{r_m}:ror{w} {mod}{r_m}{w}
497 1101001{w},{mod}001{r_m}:ror{w} %cl,{mod}{r_m}{w}
498 1100000{w},{mod}001{r_m},{imm8}:ror{w} {imm8},{mod}{r_m}{w}
[all...] |
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | [all...] |
| /external/llvm/test/MC/ARM/ |
| thumb2-narrow-dp.ll | 563 // ROR
569 ROR r5, r1, r5 // Must use wide encoding as not flag-setting
580 // CHECK: ror.w r5, r1, r5 @ encoding: [0x61,0xfa,0x05,0xf5]
[all...] |
| /external/chromium_org/v8/src/arm/ |
| assembler-arm.cc | 347 ASSERT(shift_op != ROR || shift_imm != 0); // use RRX if you mean it
353 // encoded as ROR with shift_imm == 0
355 shift_op_ = ROR;
[all...] |
| /external/dropbear/libtomcrypt/ |
| changes | [all...] |
| makefile.icc | 7 # "-ip" and "-x*" seem to break the code (ROL/ROR macro problems). As the makefile
|
| /external/llvm/lib/Target/ARM/ |
| README.txt | 624 eor r1, r0, r0, ror #16
627 eor r0, r1, r0, ror #8
|
| /external/v8/src/arm/ |
| disasm-arm.cc | 204 "lsl", "lsr", "asr", "ror"
224 if ((shift == ROR) && (shift_amount == 0)) {
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| GGLAssembler.cpp | 209 reg_imm(parts.count.reg, ROR, GGL_DITHER_ORDER_SHIFT));
213 reg_imm(parts.count.reg, ROR, 32 - GGL_DITHER_ORDER_SHIFT));
[all...] |
| /art/compiler/dex/quick/arm/ |
| target_arm.cc | 246 "ror"};
|
| /dalvik/vm/compiler/codegen/x86/libenc/ |
| encoder.h | 493 // shift instructions: shl, shr, sar, shld, shrd, ror
|
| /external/chromium_org/third_party/harfbuzz-ng/src/ |
| hb-private.hh | 518 * results in a single ror instruction, does NOT speed this up. In fact, it
|
| /external/chromium_org/third_party/opus/src/silk/ |
| SigProc_FIX.h | 361 compile it into a 'ror' instruction if available. No need for inline ASM! */
[all...] |
| /external/flac/libFLAC/ia32/ |
| bitreader_asm.nasm | 425 ror edx, cl ; restored.
|
| /external/harfbuzz_ng/src/ |
| hb-private.hh | 507 * results in a single ror instruction, does NOT speed this up. In fact, it
|
| /external/valgrind/main/VEX/priv/ |
| guest_arm_toIR.c | 85 (mov r12, r12, ROR #3; mov r12, r12, ROR #13;
86 mov r12, r12, ROR #29; mov r12, r12, ROR #19)
[all...] |
| host_arm_defs.h | 229 ARMri84_I84=7, /* imm8 `ror` (2 * imm4) */
|
| host_mips_defs.h | 250 MIPSri84_I84 = 5, /* imm8 `ror` (2 * imm4) */
|
| /external/valgrind/main/coregrind/ |
| m_transtab.c | 1259 UInt ror = 7; local
[all...] |
| /external/valgrind/main/exp-bbv/tests/amd64-linux/ |
| ll.S | 273 ror $8,%eax # not any smaller than a mov
|
| /external/valgrind/main/exp-bbv/tests/x86-linux/ |
| ll.S | 267 ror $8,%eax # not any smaller than a mov
|
