| /external/llvm/test/MC/PowerPC/ |
| ppc-llong.s | 10 # CHECK: Section {
11 # CHECK: Name: .data
12 # CHECK-NEXT: Type: SHT_PROGBITS
13 # CHECK-NEXT: Flags [
14 # CHECK-NEXT: SHF_ALLOC
15 # CHECK-NEXT: SHF_WRITE
16 # CHECK-NEXT: ]
17 # CHECK-NEXT: Address: 0x0
18 # CHECK-NEXT: Offset:
19 # CHECK-NEXT: Size:
[all...] |
| ppc-word.s | 10 # CHECK: Section {
11 # CHECK: Name: .data
12 # CHECK-NEXT: Type: SHT_PROGBITS
13 # CHECK-NEXT: Flags [
14 # CHECK-NEXT: SHF_ALLOC
15 # CHECK-NEXT: SHF_WRITE
16 # CHECK-NEXT: ]
17 # CHECK-NEXT: Address: 0x0
18 # CHECK-NEXT: Offset:
19 # CHECK-NEXT: Size:
[all...] |
| ppc64-errors.s | 7 # CHECK: error: invalid operand for instruction
8 # CHECK-NEXT: add 32, 32, 32
11 # CHECK: error: invalid register name
12 # CHECK-NEXT: add %r32, %r32, %r32
17 # CHECK: error: invalid operand for instruction
18 # CHECK-NEXT: add 3, symbol@tls, 4
21 # CHECK: error: invalid operand for instruction
22 # CHECK-NEXT: subf 3, 4, symbol@tls
27 # CHECK: error: invalid operand for instruction
28 # CHECK-NEXT: addi 1, 0, -3276
[all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-cpu-x64.cc | 39 CHECK(cpu.has_fpu());
40 CHECK(cpu.has_cmov());
41 CHECK(cpu.has_mmx());
42 CHECK(cpu.has_sse());
43 CHECK(cpu.has_sse2());
|
| /ndk/tests/device/test-cpufeatures/jni/ |
| test_cpufeatures.c | 40 #define CHECK(name) \
44 CHECK(LDREX_STREX)
45 CHECK(VFPv2)
46 CHECK(ARMv7)
47 CHECK(VFPv3)
48 CHECK(VFP_D32)
49 CHECK(VFP_FP16)
50 CHECK(VFP_FMA)
51 CHECK(NEON)
52 CHECK(NEON_FMA
[all...] |
| /external/clang/test/Analysis/ |
| traversal-path-unification.c | 9 #define CHECK(x) ((x) & 1)
11 #define CHECK(x) (x)
16 if (CHECK(i))
27 // CHECK: --END FUNCTION--
28 // CHECK-NOT: --END FUNCTION--
|
| /external/llvm/test/MC/SystemZ/ |
| regs-bad.s | 6 #CHECK: error: invalid operand for instruction
7 #CHECK: lr %f0,%r1
8 #CHECK: error: invalid operand for instruction
9 #CHECK: lr %a0,%r1
10 #CHECK: error: invalid operand for instruction
11 #CHECK: lr %r0,%f1
12 #CHECK: error: invalid operand for instruction
13 #CHECK: lr %r0,%a1
14 #CHECK: error: invalid operand for instruction
15 #CHECK: lr %r0,
[all...] |
| insn-bad.s | 5 #CHECK: error: invalid operand
6 #CHECK: a %r0, -1
7 #CHECK: error: invalid operand
8 #CHECK: a %r0, 4096
13 #CHECK: error: invalid operand
14 #CHECK: adb %f0, -1
15 #CHECK: error: invalid operand
16 #CHECK: adb %f0, 4096
21 #CHECK: error: invalid operand
22 #CHECK: aeb %f0, -
[all...] |
| /external/llvm/test/MC/AsmParser/ |
| directive_file.s | 7 # CHECK: .file "hello"
8 # CHECK: .file 1 "world"
9 # CHECK: .file 2 "directory" "file"
|
| ifdef.s | 3 # CHECK-NOT: .byte 0
4 # CHECK: .byte 1
13 # CHECK: .byte 1
14 # CHECK-NOT: .byte 0
23 # CHECK-NOT: .byte 0
24 # CHECK: .byte 1
|
| ifndef.s | 3 # CHECK: .byte 1
4 # CHECK-NOT: byte 0
13 # CHECK-NOT: byte 0
14 # CHECK: .byte 1
23 # CHECK: .byte 1
24 # CHECK-NOT: byte 0
|
| ifc.s | 3 # CHECK-NOT: .byte 0
4 # CHECK: .byte 1
11 # CHECK-NOT: .byte 0
12 # CHECK: .byte 1
19 # CHECK-NOT: .byte 0
20 # CHECK: .byte 1
27 # CHECK-NOT: .byte 0
28 # CHECK: .byte 1
35 # CHECK-NOT: .byte 0
36 # CHECK: .byte
[all...] |
| assignment.s | 3 # CHECK: TEST0:
4 # CHECK: a = 0
8 # CHECK: .globl _f1
9 # CHECK: _f1 = 0
|
| directive_comm.s | 3 # CHECK: TEST0:
4 # CHECK: .comm a,6,2
5 # CHECK: .comm b,8
6 # CHECK: .comm c,8
|
| directive_include.s | 3 # CHECK: TESTA:
4 # CHECK: TEST0:
5 # CHECK: a = 0
6 # CHECK: TESTB:
|
| directive_org.s | 3 # CHECK: TEST0:
4 # CHECK: .org 1, 0
8 # CHECK: TEST1:
9 # CHECK: .org 1, 3
|
| directive_seh.s | 3 # CHECK: .seh_proc func
4 # CHECK: .seh_pushframe @code
5 # CHECK: .seh_stackalloc 24
6 # CHECK: .seh_savereg 6, 16
7 # CHECK: .seh_savexmm 8, 0
8 # CHECK: .seh_pushreg 3
9 # CHECK: .seh_setframe 3, 0
10 # CHECK: .seh_endprologue
11 # CHECK: .seh_handler __C_specific_handler, @except
12 # CHECK-NOT: .section{{.*}}.xdat
[all...] |
| /external/llvm/test/MC/ARM/ |
| eh-directive-handlerdata.s | 4 @ Check the .handlerdata directive (without .personality directive)
22 @ CHECK:Section {
23 @ CHECK: Name: .TEST1
24 @ CHECK: SectionData (
25 @ CHECK: 0000: 1EFF2FE1 |../.|
26 @ CHECK: )
27 @ CHECK:}
29 @ CHECK:Section {
30 @ CHECK: Name: .ARM.extab.TEST1
31 @ CHECK: SectionData
[all...] |
| 2013-03-18-Br-to-label-named-like-reg.s | 2 @ CHECK: test:
3 @ CHECK: br r1
|
| eh-directive-cantunwind.s | 4 @ Check the .cantunwind directive
24 @ Check .text section
26 @ CHECK: Sections [
27 @ CHECK: Section {
28 @ CHECK: Name: .text
29 @ CHECK: SectionData (
30 @ CHECK: 0000: 1EFF2FE1 |../.|
31 @ CHECK: )
32 @ CHECK: }
36 @ Check .ARM.exidx sectio
[all...] |
| eh-directive-section.s | 4 @ Check the combination of .section, .fnstart, and .fnend directives.
47 @ Check the .TEST1 section.
49 @ CHECK: Sections [
50 @ CHECK: Section {
51 @ CHECK: Index: 4
52 @ CHECK: Name: .TEST1
53 @ CHECK: SectionData (
54 @ CHECK: 0000: 1EFF2FE1 |../.|
55 @ CHECK: )
56 @ CHECK:
[all...] |
| thumb-diagnostics.s | 2 @ RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
4 @ RUN: FileCheck --check-prefix=CHECK-ERRORS-V5 < %t %s
6 @ Check for various assembly diagnostic messages on invalid input.
10 @ CHECK-ERRORS: error: invalid instruction
11 @ CHECK-ERRORS: add r1, r2, r3
12 @ CHECK-ERRORS: ^
17 @ CHECK-ERRORS: error: instruction variant requires Thumb2
18 @ CHECK-ERRORS: add r2, r
[all...] |
| /external/chromium_org/third_party/cld/encodings/compact_lang_det/win/ |
| cld_logging.h | 14 #undef CHECK
15 #define CHECK(expr)
|
| /external/llvm/test/MC/ELF/ |
| elf_directive_previous.s | 4 # CHECK: .bss
7 # CHECK: .text
10 # CHECK: .bss
13 # CHECK: .text
|
| /external/clang/test/CodeGenCXX/ |
| bitfield-layout.cpp | 1 // RUN: %clang_cc1 %s -triple=x86_64-apple-darwin10 -emit-llvm -o - -O3 | FileCheck -check-prefix LP64 %s
2 // RUN: %clang_cc1 %s -triple=i386-apple-darwin10 -emit-llvm -o - -O3 | FileCheck -check-prefix LP32 %s
4 // CHECK-LP64: %union.Test1 = type { i32, [4 x i8] }
10 // CHECK-LP64: %union.Test2 = type { i8 }
15 // CHECK-LP64: %union.Test3 = type { [2 x i8] }
21 #define CHECK(x) if (!(x)) return __LINE__
36 CHECK(c.a == 0);
37 CHECK(c.b == (unsigned long long)-1);
38 CHECK(c.c == 0);
40 // CHECK-LP64: ret i32
[all...] |
