| /external/chromium_org/third_party/openssl/openssl/crypto/rc4/asm/ |
| rc4-md5-x86_64.pl | 215 sub R0 {
377 for(;$i<16;$i++) { R0($i,@V); unshift(@V,pop(@V)); push(@TX,shift(@TX)); }
|
| /external/mesa3d/docs/OLD/ |
| MESA_program_debug.spec | 312 be used to print the values of R0, R1, R2 and R3 while executing
|
| /external/openssl/crypto/rc4/asm/ |
| rc4-md5-x86_64.pl | 215 sub R0 {
377 for(;$i<16;$i++) { R0($i,@V); unshift(@V,pop(@V)); push(@TX,shift(@TX)); }
|
| /system/core/libpixelflinger/codeflinger/ |
| ARMAssembler.cpp | 160 MOV(AL, 0, R0, R0); // NOP
|
| GGLAssembler.cpp | 109 mBuilderContext.Rctx = reserveReg(R0); // context always in R0
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_blorp_blit.cpp | 521 struct brw_reg R0;
766 this->R0 = retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW);
876 * value of N by looking at R0.0 bits 7:6 ("Starting Sample Pair
878 * in pairs). That is, we compute 2*((R0.0 & 0xc0) >> 6) == (R0.0 &
887 struct brw_reg r0_ud1 = vec1(retype(R0, BRW_REGISTER_TYPE_UD));
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_blorp_blit.cpp | 521 struct brw_reg R0;
766 this->R0 = retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW);
876 * value of N by looking at R0.0 bits 7:6 ("Starting Sample Pair
878 * in pairs). That is, we compute 2*((R0.0 & 0xc0) >> 6) == (R0.0 &
887 struct brw_reg r0_ud1 = vec1(retype(R0, BRW_REGISTER_TYPE_UD));
[all...] |
| /external/skia/gm/ |
| strokes.cpp | 248 static skiagm::GMRegistry R0(F0);
|
| /external/libvpx/libvpx/vp8/common/ppc/ |
| variance_subpixel_altivec.asm | 18 .macro load_c V, LABEL, OFF, R0, R1
19 lis \R0, \LABEL@ha
20 la \R1, \LABEL@l(\R0)
45 load_c v20, hfilter_b, r5, r12, r0
49 load_c v28, b_hperm_b, 0, r12, r0
205 load_c v10, b_0123_b, 0, r12, r0
206 load_c v11, b_4567_b, 0, r12, r0
261 load_c v10, b_hilo_b, 0, r12, r0
296 load_c v10, b_0123_b, 0, r12, r0
297 load_c v11, b_4567_b, 0, r12, r0
[all...] |
| filter_altivec.asm | 17 .macro load_c V, LABEL, OFF, R0, R1
18 lis \R0, \LABEL@ha
19 la \R1, \LABEL@l(\R0)
325 lwz r0, 0(r1)
326 stw r0, 0(r7)
329 lwz r0, 4(r1)
330 stw r0, 0(r7)
333 lwz r0, 8(r1)
334 stw r0, 0(r7)
337 lwz r0, 12(r1
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMAsmPrinter.cpp | [all...] |
| ARMISelLowering.cpp | 90 ARM::R0, ARM::R1, ARM::R2, ARM::R3
[all...] |
| ARMFastISel.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonCopyToCombine.cpp | 208 return (Reg - Hexagon::R0) % 2 == 0;
|
| HexagonISelLowering.cpp | 174 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4,
248 if (unsigned Reg = State.AllocateReg(Hexagon::R0)) {
839 // callee return the result direclty through R0/R1.
[all...] |
| /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/ |
| org.apache.lucene.analysis_1.9.1.v20100518-1140.jar | |
| /external/llvm/lib/Target/PowerPC/ |
| PPCAsmPrinter.cpp | 286 const char *RegName = "r0";
[all...] |
| PPCInstrInfo.cpp | 511 // The first input register of isel cannot be r0. If it is a member
512 // of a register class that can be r0, then copy it first (the
514 if (MRI.getRegClass(FirstReg)->contains(PPC::R0) ||
[all...] |
| /external/clang/lib/CodeGen/ |
| MicrosoftCXXABI.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 35 PPC::R0, PPC::R1, PPC::R2, PPC::R3,
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/valgrind/main/memcheck/ |
| mc_machine.c | [all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | [all...] |
| /external/llvm/test/MC/ARM/ |
| basic-thumb2-instructions.s | 20 adc r0, r1, #4
21 adcs r0, r1, #0
30 @ CHECK: adc r0, r1, #4 @ encoding: [0x41,0xf1,0x04,0x00]
31 @ CHECK: adcs r0, r1, #0 @ encoding: [0x51,0xf1,0x00,0x00]
47 adc r0, r1, r3, ror #4
48 adcs r0, r1, r3, lsl #7
49 adc.w r0, r1, r3, lsr #31
50 adcs.w r0, r1, r3, asr #32
57 @ CHECK: adc.w r0, r1, r3, ror #4 @ encoding: [0x41,0xeb,0x33,0x10]
58 @ CHECK: adcs.w r0, r1, r3, lsl #7 @ encoding: [0x51,0xeb,0xc3,0x10
[all...] |
