| /external/chromium_org/third_party/WebKit/Source/platform/text/ |
| BidiResolver.h | 61 : eor(WTF::Unicode::OtherNeutral)
72 eor = lastStrong = last = direction;
77 : eor(eorDir)
84 WTF::Unicode::Direction eor; member in struct:WebCore::BidiStatus
107 return status1.eor == status2.eor && status1.last == status2.last && status1.lastStrong == status2.lastStrong && *(status1.context) == *(status2.context);
196 void setEorDir(WTF::Unicode::Direction eorDir) { m_status.eor = eorDir; }
246 // sor and eor are "start of run" and "end of run" respectively and correpond
253 // m_endOfRunAtEndOfLine is "the position last eor in the end of line"
310 m_status.eor = WTF::Unicode::OtherNeutral
[all...] |
| /external/llvm/test/MC/AArch64/ |
| neon-bitwise-instructions.s | 26 // Vector Eor
28 eor v0.8b, v1.8b, v2.8b
29 eor v0.16b, v1.16b, v2.16b
31 // CHECK: eor v0.8b, v1.8b, v2.8b // encoding: [0x20,0x1c,0x22,0x2e]
32 // CHECK: eor v0.16b, v1.16b, v2.16b // encoding: [0x20,0x1c,0x22,0x6e]
|
| /external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/ |
| sha256-armv4.pl | 69 eor $t0,$t0,$e,ror#$Sigma1[1]
70 eor $t1,$f,$g
79 eor $t0,$t0,$e,ror#$Sigma1[2] @ Sigma1(e)
83 eor $t1,$t1,$g @ Ch(e,f,g)
87 eor $h,$h,$a,ror#$Sigma0[1]
89 eor $h,$h,$a,ror#$Sigma0[2] @ Sigma0(a)
111 eor $t0,$t0,$t3,ror#$sigma0[1]
113 eor $t0,$t0,$t3,lsr#$sigma0[2] @ sigma0(X[i+1])
116 eor $t3,$t3,$t2,ror#$sigma1[1]
118 eor $t3,$t3,$t2,lsr#$sigma1[2] @ sigma1(X[i+14]
[all...] |
| sha1-armv4-large.pl | 82 eor $t0,$t0,$t1
83 eor $t2,$t2,$t3 @ 1 cycle stall
84 eor $t1,$c,$d @ F_xx_xx
87 eor $t0,$t0,$t2,ror#31
105 eor $t1,$c,$d @ F_xx_xx
112 eor $t1,$c,$d @ F_xx_xx
120 eor $t1,$t1,$d,ror#2 @ F_00_19(B,C,D)
130 eor $t1,$t1,$d,ror#2 @ F_00_19(B,C,D)
137 &Xupdate(@_,"eor $t1,$b,$t1,ror#2");
|
| sha1-thumb.pl | 70 eor $t1,$d
72 eor $t1,$d @ F_00_19(B,C,D)
81 eor $t1,$c
82 eor $t1,$d @ F_20_39(B,C,D)
161 eor $a,$b
162 eor $a,$c
163 eor $a,$d
|
| sha512-armv4.S | 138 eor r9,r9,r8,lsl#18
140 eor r10,r10,r7,lsl#18
142 eor r9,r9,r7,lsr#18
143 eor r10,r10,r8,lsr#18
144 eor r9,r9,r8,lsl#14
145 eor r10,r10,r7,lsl#14
146 eor r9,r9,r8,lsr#9
147 eor r10,r10,r7,lsr#9
148 eor r9,r9,r7,lsl#23
149 eor r10,r10,r8,lsl#23 @ Sigma1(e
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha256-armv4.pl | 69 eor $t0,$t0,$e,ror#$Sigma1[1]
70 eor $t1,$f,$g
79 eor $t0,$t0,$e,ror#$Sigma1[2] @ Sigma1(e)
83 eor $t1,$t1,$g @ Ch(e,f,g)
87 eor $h,$h,$a,ror#$Sigma0[1]
89 eor $h,$h,$a,ror#$Sigma0[2] @ Sigma0(a)
111 eor $t0,$t0,$t3,ror#$sigma0[1]
113 eor $t0,$t0,$t3,lsr#$sigma0[2] @ sigma0(X[i+1])
116 eor $t3,$t3,$t2,ror#$sigma1[1]
118 eor $t3,$t3,$t2,lsr#$sigma1[2] @ sigma1(X[i+14]
[all...] |
| sha1-armv4-large.pl | 82 eor $t0,$t0,$t1
83 eor $t2,$t2,$t3 @ 1 cycle stall
84 eor $t1,$c,$d @ F_xx_xx
87 eor $t0,$t0,$t2,ror#31
105 eor $t1,$c,$d @ F_xx_xx
112 eor $t1,$c,$d @ F_xx_xx
120 eor $t1,$t1,$d,ror#2 @ F_00_19(B,C,D)
130 eor $t1,$t1,$d,ror#2 @ F_00_19(B,C,D)
137 &Xupdate(@_,"eor $t1,$b,$t1,ror#2");
|
| sha1-thumb.pl | 70 eor $t1,$d
72 eor $t1,$d @ F_00_19(B,C,D)
81 eor $t1,$c
82 eor $t1,$d @ F_20_39(B,C,D)
161 eor $a,$b
162 eor $a,$c
163 eor $a,$d
|
| sha512-armv4.S | 138 eor r9,r9,r8,lsl#18
140 eor r10,r10,r7,lsl#18
142 eor r9,r9,r7,lsr#18
143 eor r10,r10,r8,lsr#18
144 eor r9,r9,r8,lsl#14
145 eor r10,r10,r7,lsl#14
146 eor r9,r9,r8,lsr#9
147 eor r10,r10,r7,lsr#9
148 eor r9,r9,r7,lsl#23
149 eor r10,r10,r8,lsl#23 @ Sigma1(e
[all...] |
| /external/llvm/test/MC/ARM/ |
| arm-aliases.s | 7 eor r1, r2, r3, lsr #0
14 @ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0]
|
| arm-arithmetic-aliases.s | 46 eor r2, r2, #6 label
47 eor r2, #6 label
48 eor r2, r2, r3 label
49 eor r2, r3 label
51 @ CHECK: eor r2, r2, #6 @ encoding: [0x06,0x20,0x22,0xe2]
52 @ CHECK: eor r2, r2, #6 @ encoding: [0x06,0x20,0x22,0xe2]
53 @ CHECK: eor r2, r2, r3 @ encoding: [0x03,0x20,0x22,0xe0]
54 @ CHECK: eor r2, r2, r3 @ encoding: [0x03,0x20,0x22,0xe0]
|
| arm_instructions.s | 28 @ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0]
29 eor r1,r2,r3
|
| /external/chromium_org/third_party/openssl/openssl/crypto/ |
| armv4cpuid.S | 60 eor ip,ip,ip
95 eor r2,r2,r2
96 eor r3,r3,r3
97 eor ip,ip,ip
122 eor r0,r0,r0
131 eor r0,r0,r0
|
| /external/openssl/crypto/ |
| armv4cpuid.S | 60 eor ip,ip,ip
95 eor r2,r2,r2
96 eor r3,r3,r3
97 eor ip,ip,ip
122 eor r0,r0,r0
131 eor r0,r0,r0
|
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| simpleloopfilter_v6.asm | 92 eor r3, r3, r2 ; p1 offset to convert to a signed value
93 eor r6, r6, r2 ; q1 offset to convert to a signed value
94 eor r4, r4, r2 ; p0 offset to convert to a signed value
95 eor r5, r5, r2 ; q0 offset to convert to a signed value
119 eor r5, r5, r2 ; *oq0 = u^0x80
121 eor r4, r4, r2 ; *op0 = u^0x80
198 eor r3, r3, r2 ; p1 offset to convert to a signed value
199 eor r6, r6, r2 ; q1 offset to convert to a signed value
200 eor r4, r4, r2 ; p0 offset to convert to a signed value
201 eor r5, r5, r2 ; q0 offset to convert to a signed valu
[all...] |
| vp8_variance_halfpixvar16x16_hv_armv6.asm | 48 eor r4, r4, r10
52 eor r5, r5, r10
57 eor r4, r4, r10
91 eor r4, r4, r10
95 eor r5, r5, r10
100 eor r4, r4, r10
133 eor r4, r4, r10
137 eor r5, r5, r10
142 eor r4, r4, r10
173 eor r4, r4, r1
[all...] |
| loopfilter_v6.asm | 172 eor r7, r7, r12 ; p1 offset to convert to a signed value
173 eor r8, r8, r12 ; p0 offset to convert to a signed value
174 eor r9, r9, r12 ; q0 offset to convert to a signed value
175 eor r10, r10, r12 ; q1 offset to convert to a signed value
240 eor r11, r11, r12 ; *op1 = u^0x80
242 eor r9, r9, r12 ; *op0 = u^0x80
244 eor r8, r8, r12 ; *oq0 = u^0x80
246 eor r10, r10, r12 ; *oq1 = u^0x80
383 eor r7, r7, r12 ; ps1
384 eor r8, r8, r12 ; ps
[all...] |
| /bionic/libc/arch-arm/bionic/ |
| strcmp.S | 57 eor r2, r0, r1
76 eor r2, r2, #3
185 eor t1, t1, w1
233 eor t1, t1, w1
278 eor t1, t1, w1
|
| strcmp.a15.S | 337 eor r3, r2, r3
429 eor r2, r0, r1
445 eor r2, r2, #3
654 eor t1, t1, w1
701 eor t1, t1, w1
745 eor t1, t1, w1
|
| /bionic/libc/arch-arm/generic/bionic/ |
| strcmp.S | 57 eor r2, r0, r1
76 eor r2, r2, #3
185 eor t1, t1, w1
233 eor t1, t1, w1
278 eor t1, t1, w1
|
| strcpy.S | 37 eor r2, r0, r1
|
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-arm.cc | 112 COMPARE(eor(r4, r5, Operand(r6, LSL, 0)),
113 "e0254006 eor r4, r5, r6");
114 COMPARE(eor(r4, r5, Operand(r7, LSL, 1), SetCC),
116 COMPARE(eor(r4, r5, Operand(r8, LSL, 2), LeaveCC, ne),
118 COMPARE(eor(r4, r5, Operand(r9, LSL, 3), SetCC, cs),
272 // We only disassemble one instruction so the eor instruction is not here.
273 COMPARE(eor(r5, r4, Operand(0x1234), LeaveCC, ne),
283 // We only disassemble one instruction so the eor instruction is not here.
284 // The eor does the setcc so we get a movw here.
285 COMPARE(eor(r5, r4, Operand(0x1234), SetCC, ne)
[all...] |
| /external/v8/test/cctest/ |
| test-disasm-arm.cc | 116 COMPARE(eor(r4, r5, Operand(r6, LSL, 0)),
117 "e0254006 eor r4, r5, r6");
118 COMPARE(eor(r4, r5, Operand(r7, LSL, 1), SetCC),
120 COMPARE(eor(r4, r5, Operand(r8, LSL, 2), LeaveCC, ne),
122 COMPARE(eor(r4, r5, Operand(r9, LSL, 3), SetCC, cs),
276 // We only disassemble one instruction so the eor instruction is not here.
277 COMPARE(eor(r5, r4, Operand(0x1234), LeaveCC, ne),
283 // We only disassemble one instruction so the eor instruction is not here.
284 // The eor does the setcc so we get a movw here.
285 COMPARE(eor(r5, r4, Operand(0x1234), SetCC, ne)
[all...] |
| /bionic/libc/arch-arm/cortex-a9/bionic/ |
| strcmp.S | 310 eor r3, r2, r3
416 eor t1, t1, w1
464 eor t1, t1, w1
509 eor t1, t1, w1
|
