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    Searched refs:getImm (Results 101 - 125 of 181) sorted by null

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  /external/llvm/lib/Target/R600/
R600Packetizer.cpp 81 if (OperandIdx > -1 && BI->getOperand(OperandIdx).getImm() == 0)
312 (MI->getOpcode() == AMDGPU::CF_ALU && !MI->getOperand(8).getImm())) {
R600OptimizeVectorRegisters.cpp 66 unsigned Chan = Instr->getOperand(i + 1).getImm();
250 unsigned Swizzle = MI.getOperand(i + Offset).getImm() + 1;
R600EmitClauseMarkers.cpp 176 if (TII->getFlagOp(I).getImm() & MO_FLAG_PUSH)
  /external/llvm/lib/Target/X86/
X86FrameLowering.cpp 215 *NumBytes += PI->getOperand(2).getImm();
221 *NumBytes -= PI->getOperand(2).getImm();
244 *NumBytes -= NI->getOperand(2).getImm();
251 *NumBytes += NI->getOperand(2).getImm();
278 Offset += PI->getOperand(2).getImm();
284 Offset -= PI->getOperand(2).getImm();
561 StackSize = MI.getOperand(2).getImm() / StackDivide;
    [all...]
X86CodeEmitter.cpp 477 DispVal = Op3.getImm();
576 unsigned SS = SSTable[Scale.getImm()];
    [all...]
  /external/llvm/lib/Target/ARM/
ARMConstantIslandPass.cpp     [all...]
MLxExpansionPass.cpp 281 unsigned LaneImm = HasLane ? MI->getOperand(4).getImm() : 0;
283 ARMCC::CondCodes Pred = (ARMCC::CondCodes)MI->getOperand(NextOp).getImm();
  /external/llvm/lib/Target/AArch64/
AArch64FrameLowering.cpp 247 ArgumentPopSize = StackAdjust.getImm();
607 uint64_t CalleePopAmount = IsDestroy ? MI->getOperand(1).getImm() : 0;
612 int64_t Amount = MI->getOperand(0).getImm();
AArch64InstrInfo.cpp 255 switch (Cond[0].getImm()) {
257 A64CC::CondCodes CC = static_cast<A64CC::CondCodes>(Cond[1].getImm());
301 MachineInstrBuilder MIB = BuildMI(&MBB, DL, get(Cond[0].getImm()));
308 MachineInstrBuilder MIB = BuildMI(&MBB, DL, get(Cond[0].getImm()));
  /external/llvm/lib/Target/Mips/
MipsSEISelDAGToDAG.cpp 47 unsigned Mask = MI.getOperand(1).getImm();
76 (MI.getOperand(2).getImm() == 0)) {
81 (MI.getOperand(2).getImm() == 0)) {
Mips16FrameLowering.cpp 146 int64_t Amount = I->getOperand(0).getImm();
  /external/llvm/lib/Target/Hexagon/
HexagonNewValueJump.cpp 229 int64_t v = MI->getOperand(2).getImm();
503 cmpOp2 = MI->getOperand(2).getImm();
  /external/llvm/lib/CodeGen/
ExpandPostRAPseudos.cpp 88 unsigned SubIdx = MI->getOperand(3).getImm();
PrologEpilogInserter.cpp 177 unsigned Size = I->getOperand(0).getImm();
183 unsigned ExtraInfo = I->getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
783 int Size = I->getOperand(0).getImm();
817 Offset.setImm(Offset.getImm() +
    [all...]
  /external/llvm/lib/Target/MSP430/
MSP430RegisterInfo.cpp 128 Offset += MI.getOperand(FIOperandNum + 1).getImm();
  /external/llvm/lib/Target/PowerPC/
PPCMCInstLower.cpp 180 MCOp = MCOperand::CreateImm(MO.getImm());
PPCRegisterInfo.cpp 617 Offset += MI.getOperand(OffsetOperandNo).getImm();
754 Offset += MI->getOperand(OffsetOperandNo).getImm();
771 MI->getOperand(2).getImm() == 0)
835 Offset += MI.getOperand(OffsetOperandNo).getImm();
  /external/llvm/lib/Target/Sparc/
SparcFrameLowering.cpp 81 int Size = MI.getOperand(0).getImm();
  /external/llvm/lib/Target/XCore/
XCoreRegisterInfo.cpp 142 Offset += MI.getOperand(FIOperandNum + 1).getImm();
  /external/llvm/utils/TableGen/
CodeGenInstruction.h 316 int64_t getImm() const { assert(isImm()); return Imm; }
FastISelEmitter.cpp 88 static OpKind getImm(unsigned V) {
142 Result.Operands.push_back(OpKind::getImm(0));
182 Operands.push_back(OpKind::getImm(0));
222 Operands.push_back(OpKind::getImm(PredNo));
  /external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 292 const MCExpr *Expr = getImm();
325 const MCExpr *getImm() const {
469 int MemOffset = Op.getImm();
534 int ImmValue = ImmOp.getImm();
579 int ImmValue = ImmOp.getImm();
619 int ImmValue = ImmOp.getImm();
663 ImmOffset = Inst.getOperand(2).getImm();
    [all...]
  /external/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp     [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
R600ISelLowering.cpp 99 int64_t RegIndex = MI->getOperand(1).getImm();
148 int64_t ReservedIndex = MI->getOperand(0).getImm();
  /external/llvm/include/llvm/CodeGen/
MachineInstr.h 467 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
481 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
    [all...]

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